Aldec Design and Verification Blog Trending Articles Bridging Simulation and Hardware Advanced Static Linting for FPGA Performance Optimization Scalable Cloud-based CI/CD HDL Verification Environment Navigating VUnit: A Practical Guide to Modifying Testing Approaches Speeding Up Simulation with VUnit for Parallel Testing Introduction to VUnit FPGA Design Verification in a Nutshell All Categories Corporate DO-254 Compliance Embedded Solutions Emulation/Acceleration FPGA Design Functional Verification High Performance Computing Requirements Management SoC and ASIC Prototyping SoC Design and Validation Specialized Applications Aldec Springs Into Action A look back at a busy industry show season It’s been a busy season for Aldec. The weather has warmed here in the desert and as the trees and greenery enliven in spring, Aldec has also been bursting with activity. From DVCon to the International Symposium on FPGAs in the US to Embedded World ... Tags:Aviation,Embedded,FPGA,Hardware Like(4) Comments (0) Read more 90’s Kid Active-HDL Celebrates Sweet 16 Serving FPGA Designers as the tool of choice since, like, forever As the proud Product Manager of Aldec’s FPGA Design Simulation solution, I am excited (like it was my first Cranberries concert) to announce that Active-HDL™ is celebrating 16 years since its initial release in 1997.... Tags:Assertions,Co-simulation,Coverage,Debugging,Design,Digital,Documentation,FPGA,HDL,IEEE,Matlab,OS-VVM,Simulation,standards,university,Verification,Verilog,VHDL,Xilinx Like(2) Comments (2) Read more Register for Aldec Technical Sessions & Demos at DAC 2013 Advanced Verification, HW/SW Emulation, and more This year’s Design Automation Conference (DAC) will be held in Austin, Texas. If we survive the 70% humidity, our team looks forward to meeting you at Booth #2225 from June 3-5. Aldec HQ is located in Nevada just outside of Las Vegas… so we’re accustomed to more of a dry heat.... Tags:HES,Functional Verification,FPGA,Design,Emulation,Aceleration,ASIC,SoC Like(1) Comments (0) Read more Aldec in the Classroom Of Today’s Top Engineering Universities Aldec’s University Program is committed to providing future engineers with world-class tools for their digital system designs and verification methodologies. These tools are offered at a lower cost to educational facilities who meet the university program requirements. In addition, students... Tags:Prototyping,Functional Verification,FPGA,Emulation,Aceleration Like(1) Comments (0) Read more
