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Plots: A New Way To Analyze Data

Data analysis is often a very time consuming process for a hardware design or verification engineer. We always end up using the waveform viewer which may not be very efficient in giving us a high-level overview of what we’re looking for. Data that is spread across...

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Emulation in FPGA

For many years, emulators were available only to verification teams working on the largest projects in companies with deep enough pockets. Due to size rather than capabilities they were called “Big Box” emulators and typically were used in order to recover...

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Code Coverage in HDL Editor? Now That’s a Nice Feature.

For a long time I have been a fan of code coverage tools that are embedded into the simulators themselves, and which give you the ability to switch easily between the code and the coverage results. It is particularly helpful to have a way...

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Understanding the inner workings of UVM
UVM Basics Part 1 of 3

We have all been witnesses to the rapid improvements of the iPhone processor chip every year. With the iPhone 8 featuring the newest A11 Bionic at 10 nm FinFET with 4.3 billion transistors, I can’t personally fathom the amount...

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Synthesis of Energy-Efficient FSMs Implemented in PLD Circuits
Finite State Machines in low-power world

Well, summer has been and gone; and for most of us it was a time to relax and reflect on our working practices. What can we do to achieve better results? And what can we do to break out of the routine of working on so many revisions?...

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Accelerating Simulation of Vivado Designs with HES
Improve verification speedup with Aldec’s HES-DVM

FPGA Design Verification Challenge The FPGA design and verification “ecosystem” changes rapidly to keep pace with the fast growing size of FPGA devices. The largest Xilinx Virtex UltraSCALE chips provide 4.4 Million logic cells...

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VHDL-2017: Some of My Favorite Things

For the past several years I have had the privilege to chair the IEEE 1076 VHDL working group. In March we handed off the revisions to the VHDL LRM to our technical editor to finalize the document for balloting. As we are waiting for the standards process to finish up, I thought I would share my favorite new additions. Let me start with an executive summary: ...

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Austin's Best Vegetarian Restaurants: The Quest Continues

If you’re headed to DAC, you should know it's fixing to be the hottest summer ever in Austin, but for brave and hungry meatless eaters, this town is an increasingly cool destination, with creative restauranteurs finding new ways to transform meaty favorites into plant-based edible delights....

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FPGAs in an SoC World
How modern FPGA architecture influences verification methodologies

The SoC domination observed so far in the ASIC industry is coming to the FPGA world and changing the way FPGAs are used and FPGA projects are verified. The latest SoC FPGA devices  ...

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The UVM Configuration Database
Keeping a neat repository for flexible testbench structure

When I want to wear a certain clothing item, I take out it of the closet. When I go shopping, I add those clothes it to my closet and there are now new items for me to pick out in the future....

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