A Proven EDA Solutions Provider makes all the difference.

Our promise to deliver leading verification methodologies that support the latest Ianguage standards allows our customers to grow while leveraging evolving technologies.

InterMotion Technology boosts IP verification productivity for Lattice Semiconductor’s CrossLink FPGA family using Aldec’s Active-HDL March 24 Aldec to Present at Certification Together International Conference March 02 Aldec and Codasip at Embedded World: Showcasing an Integrated UVM Simulation Environment for Verifying Custom Instructions with RISC-V Cores February 19 Cobham Gaisler successfully verifies its first RISC-V processor, NOEL-V, using Aldec’s Riviera-PRO for HDL Simulation January 28 Aldec Enhances Riviera-PRO’s VHDL and UVVM Support December 17 View all news
Ask Us a Question
x
Ask Us a Question
x
Captcha ImageReload Captcha
Incorrect data entered.
Thank you! Your question has been submitted. Please allow 1-3 business days for someone to respond to your question.
Internal error occurred. Your question was not submitted. Please contact us using Feedback form.
We use cookies to ensure we give you the best user experience and to provide you with content we believe will be of relevance to you. If you continue to use our site, you consent to our use of cookies. A detailed overview on the use of cookies and other website information is located in our Privacy Policy.