Aldec @ DAC 2023: Presenting Design Verification Tools and Solutions for FPGAs and SoCs

Date: Jun 26, 2023
Type: Release

Henderson, NV, USA – June 26, 2023 – Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA and SoC designs, will showcase its cutting-edge design verification tools and solutions at the 60th Design Automation Conference (DAC) on July 10-12, 2023.


At the conference, Aldec will present an extensive range of technologies in simulation-based verification, linting/CDC analysis, and hardware-assisted verification. The company’s solutions are purposefully designed to facilitate high-performance HDL co-simulation and co-emulation with various domain-specific frameworks and libraries in C, C++, SystemC or Python, making it easier for engineers to embrace FPGA technology.


“For almost 40 years, Aldec’s corporate DNA and identity have been deeply rooted in FPGA design verification,” said Louie De Luna, Director of Marketing. “The remarkable progress and advancement of FPGA technology and device architecture in the past ten years have, for example, led to the widespread adoption of FPGAs in embedded designs and data center applications. FPGAs are now working alongside general-purpose CPUs, GPUs, and ASICs for heterogeneous computing of various domain-specific workloads.”


Presentations and Demonstrations at Booth #1425

The following presentations will be offered continuously throughout the three exhibition days of DAC – July 10, 11 and 12 from 10:00 AM – 6:00 PM US Pacific Time Zone.


Each presentation will last about 30 minutes and interested parties are advised to pre-register and select their preferred subject matter and to secure their preferred date and time slot.


1. Simulation-Based Verification

1.1. System Simulation of AMD® Versal™ ACAP Designs Read more

1.2. UVM Testbench Generator for Zynq™ MPSoC™ Designs Read more

1.3. RISC-V Core Simulation with UVM and RISC-V DV Instruction Generator Read more

1.4. VHDL 2019: Just the New Stuff Read more

1.5. OSVVM Testbench Generator for VHDL Designs Read more

1.6. Assertion-based Verification for VHDL Designs Read more

1.7. Python2RTLSimulator Interface Read more

1.8. Effective Testbench Creation Using Cocotb and Python Read more

2. Linting & CDC Analysis

2.1. Bus Interfaces Extraction, Static Checks and Dynamic Verification Read more

2.2. CDC Verification of Hard IP Blocks Read more

2.3. Running CDC Analysis with AMD Parameterized Macros Read more

2.4. Linting and CDC Verification of Microchip® Icicle™ Reference Design Read more

3. Hardware-Assisted Verification

3.1. Standardized Co-Simulation Interface with 3rd Party Development Frameworks and HDL Simulator Read more

3.2. Verification of High-Speed Interfaces of Safety-Critical FPGA Designs Read more

3.3. Harnessing FPGA-Based Emulation for Robust Test Scenarios Read more

3.4. Aldec’s New Synthesis Tool Targeting AMD and Intel® FPGAs Read more


Contact or call +1(702) 990-4400 for more details.


About DAC
The Design Automation Conference (DAC) is recognized as the premier event for the design and design automation of electronic chips to systems.  DAC offers outstanding training, education, exhibits and superb networking opportunities for designers, researchers, tool developers and vendors. The conference is sponsored by the Association for Computing Machinery (ACM) and the Institute of Electrical and Electronics Engineers (IEEE) and is supported by ACM's Special Interest Group on Design Automation (SIGDA) and IEEE's Council on Electronic Design Automation (CEDA).


About Aldec

Aldec Inc., headquartered in Henderson, Nevada, is an industry leader and pioneer in Electronic Design Verification. Established in 1984, Aldec offers patented verification technology in the areas of mixed-language RTL simulation, FPGA-based acceleration and emulation, multi-FPGA partitioning and SoC/ASIC prototyping, design rule checking, clock domain crossing analysis, logic synthesis, RTAX/RTSX prototyping of radiation-tolerant FPGAs for space applications, requirements traceability and functional verification for military, aerospace, avionics, automotive, medical, telecommunications and industrial applications.

Aldec is a registered trademark of Aldec, Inc. All other trademarks or registered trademarks are the property of their respective owners.

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