Products Overview Emulation & Prototyping HES-DVM HES-DVM™ is a fully automated and scriptable Hybrid Verification and Validation environment for SoC and ASIC designs up to 633M ASIC gates capable of bit-level simulation acceleration, SCE-MI 2.1 transaction emulation, hardware prototyping, and virtual modeling. Utilizing the latest in co-emulation ... Read more Datasheet HES™ FPGA Boards HES™ is a SoC/ASIC pre-silicon prototyping solution for hardware verification and software validation teams and the High Performance Computing (HPC) platform for algorithms acceleration. The boards are based on largest Virtex-7 and Virtex UltraScale FPGA and appear in single or multi-FPGA configurations and can be interconnected on a backplane board providing up to 663 Million ASIC gates.... Virtex UltraScale Main Boards Virtex-7 Main Boards Virtex UltraScale Main Boards Kintex UltraScale Main Boards HES Backplane Boards TySOM Boards TySOM is a family of development boards for embedded applications that features Xilinx® Zynq™ all programmable module combining FPGA with ARM® Cortex processor. Plethora of included peripherals makes these boards useful in various embedded applications like Automotive, IoT, Industrial automation or embedded HPC.... Zynq-7000 Boards Zynq-7000 Boards Daughter Cards Daughter cards provide extensions to HES or TySOM boards providing additional devices and peripherals not included in these boards. Due to using non-proprietary connectors like FMC or BPX the daughter cards can be reused across different hardware platforms.... FMC Daughter Cards BPX Daughter Cards RTAX/RTSX Adaptor Boards Aldec and Microsemi have joined together, offering a new, innovative, reprogrammable prototyping solution for Microsemi RTAX-S/SL and RTSX-SU space-flight system designs.... RTAX-S/SL Family Adaptors RTSX-SU/SX-A Family Adaptors RTAX/RTSX Netlist Converter The RTAX EDIF Netlist Converter performs automatic conversion of the RTAX-S/SL EDIF netlist to a ProASIC3E netlist, which means replacement of the primitives has to be done, with consideration of the limitations (differences between RTAX-S/SL anti-fuse and ProASIC3/E flash-based technologies). A pin remapping utility allows automatic Physical Design Constraint (PDC) file conversion which eliminates the need for additional and time consuming manual work...... Read more
