Partners

Aldec Design and Verification Blog

Trending Articles
VHDL-2017: Some of My Favorite Things

For the past several years I have had the privilege to chair the IEEE 1076 VHDL working group. In March we handed off the revisions to the VHDL LRM to our technical editor to finalize the document for balloting. As we are waiting for the standards process to finish up, I thought I would share my favorite new additions. Let me start with an executive summary: ...

Like(3) Comments (0) Read more
It’s no accident that Aldec offers the best VHDL-2008 support
Tools, Resources and Training for VHDL Users

Here at the Aldec corporate office, we have a sign that reminds us all of our mission in the field of Technology. It reads, ‘To deliver solutions that provide the highest productivity to value ratio;...

Like(2) Comments (0) Read more
90’s Kid Active-HDL Celebrates Sweet 16
Serving FPGA Designers as the tool of choice since, like, forever

As the proud Product Manager of Aldec’s  FPGA Design Simulation solution,  I am excited (like it was my first Cranberries concert) to announce that Active-HDL™ is celebrating 16 years since its initial release in 1997....

Like(1) Comments (2) Read more
Ask Us a Question
x

Ask Us a Question

x
Captcha ImageReload Captcha
Incorrect data entered.
Thank you! Your question has been submitted. Please allow 1-3 business days for someone to respond to your question.
Internal error occurred. Your question was not submitted. Please contact us using Feedback form.