Aldec Blog/News RSS Feed https://www.aldec.com Aldec News RSS Feed Blog: 2017-09-20 https://www.aldec.com/en/company/blog/146--dont-be-a-slave-to-the-documentation https://www.aldec.com/en/company/blog/146--dont-be-a-slave-to-the-documentation Wed, 20 Sep 2017 00:00:00 -0700 Don’t be a Slave to the Documentation News: 2017-09-17 https://www.aldec.com/en/company/news/2017-09-17/366 https://www.aldec.com/en/company/news/2017-09-17/366 Sun, 17 Sep 2017 00:00:00 -0700 Aldec presents 'HDL Coding Standards and Best Practices for DO-254’ tutorial at the 36th Annual DASC Blog: 2017-09-14 https://www.aldec.com/en/company/blog/145--demystifying-axi-interconnection-for-zynq-soc-fpga https://www.aldec.com/en/company/blog/145--demystifying-axi-interconnection-for-zynq-soc-fpga Thu, 14 Sep 2017 00:00:00 -0700 Demystifying AXI Interconnection for Zynq SoC FPGA News: 2017-09-12 https://www.aldec.com/en/company/news/2017-09-12/364 https://www.aldec.com/en/company/news/2017-09-12/364 Tue, 12 Sep 2017 00:00:00 -0700 Aldec @ DVCon India 2017 - accelerating SoC validation by extending QEMU open-source capabilities News: 2017-09-11 https://www.aldec.com/en/company/news/2017-09-11/363 https://www.aldec.com/en/company/news/2017-09-11/363 Mon, 11 Sep 2017 10:00:00 -0700 Aldec solves ASIC design partitioning challenges with HES-DVM Proto mode News: 2017-09-01 https://www.aldec.com/en/company/news/2017-09-01/362 https://www.aldec.com/en/company/news/2017-09-01/362 Fri, 01 Sep 2017 00:00:00 -0700 Intelligent Areospace: Reprogrammable prototyping solutions: a must for space design verification News: 2017-08-30 https://www.aldec.com/en/company/news/2017-08-30/361 https://www.aldec.com/en/company/news/2017-08-30/361 Wed, 30 Aug 2017 00:00:00 -0700 Embedded Vision: Look and Identify Blog: 2017-08-21 https://www.aldec.com/en/company/blog/144--introduction-to-zynq-architecture https://www.aldec.com/en/company/blog/144--introduction-to-zynq-architecture Mon, 21 Aug 2017 00:00:00 -0700 Introduction to Zynq™ Architecture Blog: 2017-08-09 https://www.aldec.com/en/company/blog/143--accelerating-simulation-of-vivado-designs-with-hes https://www.aldec.com/en/company/blog/143--accelerating-simulation-of-vivado-designs-with-hes Wed, 09 Aug 2017 00:00:00 -0700 Accelerating Simulation of Vivado Designs with HES News: 2017-08-08 https://www.aldec.com/en/company/news/2017-08-08/360 https://www.aldec.com/en/company/news/2017-08-08/360 Tue, 08 Aug 2017 10:00:00 -0700 Benefit from the power of the latest SystemVerilog subset constructs – with confidence Blog: 2017-08-01 https://www.aldec.com/en/company/blog/141--traceability-matrices https://www.aldec.com/en/company/blog/141--traceability-matrices Tue, 01 Aug 2017 00:00:00 -0700 Traceability Matrices: Headache or Real Value Blog: 2017-07-14 https://www.aldec.com/en/company/blog/140--vhdl-2017-some-of-my-favorite-things https://www.aldec.com/en/company/blog/140--vhdl-2017-some-of-my-favorite-things Fri, 14 Jul 2017 00:00:00 -0700 VHDL-2017: Some of My Favorite Things News: 2017-07-03 https://www.aldec.com/en/company/news/2017-07-03/357 https://www.aldec.com/en/company/news/2017-07-03/357 Mon, 03 Jul 2017 00:00:00 -0700 SemiWiki: HW and SW Co-verification for Xilinx Zynq SoC FPGAs Blog: 2017-06-15 https://www.aldec.com/en/company/blog/139--austins-best-vegetarian-restaurants-the-quest-continues https://www.aldec.com/en/company/blog/139--austins-best-vegetarian-restaurants-the-quest-continues Thu, 15 Jun 2017 00:00:00 -0700 Austin's Best Vegetarian Restaurants: The Quest Continues News: 2017-06-15 https://www.aldec.com/en/company/news/2017-06-15/355 https://www.aldec.com/en/company/news/2017-06-15/355 Thu, 15 Jun 2017 00:00:00 -0700 Aldec and Silvaco present Mixed-Signal Simulation Solution at DAC 2017 Blog: 2017-06-13 https://www.aldec.com/en/company/blog/138--emulation-on-the-cloud https://www.aldec.com/en/company/blog/138--emulation-on-the-cloud Tue, 13 Jun 2017 00:00:00 -0700 Emulation on the Cloud News: 2017-06-06 https://www.aldec.com/en/company/news/2017-06-06/354 https://www.aldec.com/en/company/news/2017-06-06/354 Tue, 06 Jun 2017 00:00:00 -0700 EE Web: The Benefits of HW/SW Co-Simulation for Zynq-Based Designs News: 2017-06-06 https://www.aldec.com/en/company/news/2017-06-06/353 https://www.aldec.com/en/company/news/2017-06-06/353 Tue, 06 Jun 2017 00:00:00 -0700 Aldec @ DAC 2017: Presenting Breakthrough Innovations in SoC Design & Verification Blog: 2017-05-31 https://www.aldec.com/en/company/blog/137--fpgas-in-an-soc-world https://www.aldec.com/en/company/blog/137--fpgas-in-an-soc-world Wed, 31 May 2017 00:00:00 -0700 FPGAs in an SoC World News: 2017-05-30 https://www.aldec.com/en/company/news/2017-05-30/356 https://www.aldec.com/en/company/news/2017-05-30/356 Tue, 30 May 2017 00:00:00 -0700 Intelligent Areospace: In safe hands: requirement-based testing for design assurance of complex, safety-critical components with high impacts of failure