Aldec Blog/News RSS Feed https://www.aldec.com Aldec News RSS Feed Blog: 2017-10-18 https://www.aldec.com/en/company/blog/151--code-coverage-in-hdl-editor-now-thats-a-nice-feature https://www.aldec.com/en/company/blog/151--code-coverage-in-hdl-editor-now-thats-a-nice-feature Wed, 18 Oct 2017 00:00:00 -0700 Code Coverage in HDL Editor? Now That’s a Nice Feature. Blog: 2017-10-17 https://www.aldec.com/en/company/blog/150--zynq-based-embedded-development-kit-for-university-programs https://www.aldec.com/en/company/blog/150--zynq-based-embedded-development-kit-for-university-programs Tue, 17 Oct 2017 00:00:00 -0700 Zynq-based Embedded Development Kit for University Programs News: 2017-10-10 https://www.aldec.com/en/company/news/2017-10-10/377 https://www.aldec.com/en/company/news/2017-10-10/377 Tue, 10 Oct 2017 00:00:00 -0700 SemiWiki: An IIot Gateway to the Cloud News: 2017-10-09 https://www.aldec.com/en/company/news/2017-10-09/376 https://www.aldec.com/en/company/news/2017-10-09/376 Mon, 09 Oct 2017 00:00:00 -0700 Aldec to Present Software Driven Test of FPGA Prototype @ DVCon Europe 2017 Blog: 2017-09-27 https://www.aldec.com/en/company/blog/149--understanding-the-inner-workings-of-uvm https://www.aldec.com/en/company/blog/149--understanding-the-inner-workings-of-uvm Wed, 27 Sep 2017 00:00:00 -0700 Understanding the inner workings of UVM Blog: 2017-09-26 https://www.aldec.com/en/company/blog/148--synthesis-of-energy-efficient-fsms-implemented-in-pld-circuits https://www.aldec.com/en/company/blog/148--synthesis-of-energy-efficient-fsms-implemented-in-pld-circuits Tue, 26 Sep 2017 00:00:00 -0700 Synthesis of Energy-Efficient FSMs Implemented in PLD Circuits Blog: 2017-09-20 https://www.aldec.com/en/company/blog/146--dont-be-a-slave-to-the-documentation https://www.aldec.com/en/company/blog/146--dont-be-a-slave-to-the-documentation Wed, 20 Sep 2017 00:00:00 -0700 Don’t be a Slave to the Documentation News: 2017-09-19 https://www.aldec.com/en/company/news/2017-09-19/368 https://www.aldec.com/en/company/news/2017-09-19/368 Tue, 19 Sep 2017 00:00:00 -0700 SemiWiki: Partitioning for Prototypes News: 2017-09-17 https://www.aldec.com/en/company/news/2017-09-17/366 https://www.aldec.com/en/company/news/2017-09-17/366 Sun, 17 Sep 2017 00:00:00 -0700 Aldec presents 'HDL Coding Standards and Best Practices for DO-254’ tutorial at the 36th Annual DASC Blog: 2017-09-14 https://www.aldec.com/en/company/blog/145--demystifying-axi-interconnection-for-zynq-soc-fpga https://www.aldec.com/en/company/blog/145--demystifying-axi-interconnection-for-zynq-soc-fpga Thu, 14 Sep 2017 00:00:00 -0700 Demystifying AXI Interconnection for Zynq SoC FPGA News: 2017-09-12 https://www.aldec.com/en/company/news/2017-09-12/364 https://www.aldec.com/en/company/news/2017-09-12/364 Tue, 12 Sep 2017 00:00:00 -0700 Aldec @ DVCon India 2017 - accelerating SoC validation by extending QEMU open-source capabilities News: 2017-09-11 https://www.aldec.com/en/company/news/2017-09-11/363 https://www.aldec.com/en/company/news/2017-09-11/363 Mon, 11 Sep 2017 10:00:00 -0700 Aldec solves ASIC design partitioning challenges with HES-DVM Proto mode News: 2017-09-01 https://www.aldec.com/en/company/news/2017-09-01/362 https://www.aldec.com/en/company/news/2017-09-01/362 Fri, 01 Sep 2017 00:00:00 -0700 Intelligent Areospace: Reprogrammable prototyping solutions: a must for space design verification News: 2017-08-30 https://www.aldec.com/en/company/news/2017-08-30/361 https://www.aldec.com/en/company/news/2017-08-30/361 Wed, 30 Aug 2017 00:00:00 -0700 Embedded Vision: Look and Identify Blog: 2017-08-21 https://www.aldec.com/en/company/blog/144--introduction-to-zynq-architecture https://www.aldec.com/en/company/blog/144--introduction-to-zynq-architecture Mon, 21 Aug 2017 00:00:00 -0700 Introduction to Zynq™ Architecture Blog: 2017-08-09 https://www.aldec.com/en/company/blog/143--accelerating-simulation-of-vivado-designs-with-hes https://www.aldec.com/en/company/blog/143--accelerating-simulation-of-vivado-designs-with-hes Wed, 09 Aug 2017 00:00:00 -0700 Accelerating Simulation of Vivado Designs with HES News: 2017-08-08 https://www.aldec.com/en/company/news/2017-08-08/360 https://www.aldec.com/en/company/news/2017-08-08/360 Tue, 08 Aug 2017 10:00:00 -0700 Benefit from the power of the latest SystemVerilog subset constructs – with confidence News: 2017-08-02 https://www.aldec.com/en/company/news/2017-08-02/369 https://www.aldec.com/en/company/news/2017-08-02/369 Wed, 02 Aug 2017 00:00:00 -0700 SemiWiki: Cloud-Based Emulation Blog: 2017-08-01 https://www.aldec.com/en/company/blog/141--traceability-matrices https://www.aldec.com/en/company/blog/141--traceability-matrices Tue, 01 Aug 2017 00:00:00 -0700 Traceability Matrices: Headache or Real Value Blog: 2017-07-14 https://www.aldec.com/en/company/blog/140--vhdl-2017-some-of-my-favorite-things https://www.aldec.com/en/company/blog/140--vhdl-2017-some-of-my-favorite-things Fri, 14 Jul 2017 00:00:00 -0700 VHDL-2017: Some of My Favorite Things