Aldec Blog/News RSS Feed https://www.aldec.com Aldec News RSS Feed News: 2018-11-13 https://www.aldec.com/en/company/news/2018-11-13/412 https://www.aldec.com/en/company/news/2018-11-13/412 Tue, 13 Nov 2018 00:00:00 -0800 VHDL 2018 Support & Enhanced Automation - Aldec adds VHDL Standard 1076-2018 extensions and automatic coverage model generation to Riviera-PRO™ News: 2018-10-22 https://www.aldec.com/en/company/news/2018-10-22/411 https://www.aldec.com/en/company/news/2018-10-22/411 Mon, 22 Oct 2018 00:00:00 -0700 Aldec’s “Hardware and Software Co-verification in Hybrid Simulation and Emulation Environment with QEMU” DVCon Europe tutorial to demonstrate how engineers can obtain a holistic view over their SoC design News: 2018-10-15 https://www.aldec.com/en/company/news/2018-10-15/409--visible-benefits-aldec-makes-available-a-4k-ultra-hd-image-pass-through-reference-design-for-users-of-its-xilinx-zynq-ultrascale-mpsoc-embedded-development-kit-tysom-3-zu7ev https://www.aldec.com/en/company/news/2018-10-15/409--visible-benefits-aldec-makes-available-a-4k-ultra-hd-image-pass-through-reference-design-for-users-of-its-xilinx-zynq-ultrascale-mpsoc-embedded-development-kit-tysom-3-zu7ev Mon, 15 Oct 2018 00:00:00 -0700 Visible Benefits News: 2018-10-15 https://www.aldec.com/en/company/news/2018-10-15/410 https://www.aldec.com/en/company/news/2018-10-15/410 Mon, 15 Oct 2018 00:00:00 -0700 A View from Above Blog: 2018-08-28 https://www.aldec.com/en/company/blog/173--what-is-birds-eye-view-adas-application-and-how-to-develop-this-using-zynq-ultrascale-mpsoc-fpga https://www.aldec.com/en/company/blog/173--what-is-birds-eye-view-adas-application-and-how-to-develop-this-using-zynq-ultrascale-mpsoc-fpga Tue, 28 Aug 2018 00:00:00 -0700 What is Bird’s Eye View ADAS Application and How to Develop This Using Zynq® UltraScale+™ MPSoC FPGA? News: 2018-08-08 https://www.aldec.com/en/company/news/2018-08-08/408 https://www.aldec.com/en/company/news/2018-08-08/408 Wed, 08 Aug 2018 00:00:00 -0700 SemiWiki: Enhancing Early Static FSM News: 2018-07-20 https://www.aldec.com/en/company/news/2018-07-20/406--aldec-to-present-at-the-6th-china-national-fpga-industry-development-forum https://www.aldec.com/en/company/news/2018-07-20/406--aldec-to-present-at-the-6th-china-national-fpga-industry-development-forum Fri, 20 Jul 2018 00:00:00 -0700 Aldec to Present at the 6th China National FPGA Industry Development Forum News: 2018-07-19 https://www.aldec.com/en/company/news/2018-07-19/405 https://www.aldec.com/en/company/news/2018-07-19/405 Thu, 19 Jul 2018 00:00:00 -0700 Enhanced early static checks of Finite State Machines and Xilinx IP-based designs News: 2018-06-11 https://www.aldec.com/en/company/news/2018-06-11/407 https://www.aldec.com/en/company/news/2018-06-11/407 Mon, 11 Jun 2018 00:00:00 -0700 SemiWiki: RAL, Lint and VHDL-2018 News: 2018-06-07 https://www.aldec.com/en/company/news/2018-06-07/404 https://www.aldec.com/en/company/news/2018-06-07/404 Thu, 07 Jun 2018 00:00:00 -0700 Aldec @ DAC 2018: Presenting Innovative SoC Design & Verification Methodologies Blog: 2018-05-30 https://www.aldec.com/en/company/blog/171--hwsw-co-simulation-for-soc-fpga-designs https://www.aldec.com/en/company/blog/171--hwsw-co-simulation-for-soc-fpga-designs Wed, 30 May 2018 00:00:00 -0700 HW/SW Co-Simulation for SoC FPGA designs Blog: 2018-05-30 https://www.aldec.com/en/company/blog/172--the-power-of-pcie-in-performance-based-fpga-world https://www.aldec.com/en/company/blog/172--the-power-of-pcie-in-performance-based-fpga-world Wed, 30 May 2018 00:00:00 -0700 The Power of PCIe in Performance-based FPGA World Blog: 2018-05-29 https://www.aldec.com/en/company/blog/170--problems-accessing-registers-see-how-uvm-ral-can-help https://www.aldec.com/en/company/blog/170--problems-accessing-registers-see-how-uvm-ral-can-help Tue, 29 May 2018 00:00:00 -0700 Problems Accessing Registers? – See how UVM RAL can help. News: 2018-05-08 https://www.aldec.com/en/company/news/2018-05-08/400 https://www.aldec.com/en/company/news/2018-05-08/400 Tue, 08 May 2018 00:00:00 -0700 Three Enhancements in One - Aldec bolsters Riviera-PRO™ with automatic UVM register generation, Unit Linting and the ability to handle early VHDL 2018 extensions News: 2018-05-02 https://www.aldec.com/en/company/news/2018-05-02/399 https://www.aldec.com/en/company/news/2018-05-02/399 Wed, 02 May 2018 00:00:00 -0700 Aldec and Tamba Networks Release Ultra Low Latency Ethernet Solution for UltraScale+ FPGA at The Trading Show 2018 Blog: 2018-04-30 https://www.aldec.com/en/company/blog/169--the-race-to-zero-latency-for-high-frequency-trading https://www.aldec.com/en/company/blog/169--the-race-to-zero-latency-for-high-frequency-trading Mon, 30 Apr 2018 00:00:00 -0700 The Race to Zero Latency for High Frequency Trading Blog: 2018-04-27 https://www.aldec.com/en/company/blog/168--verification-effectiveness-with-riviera-pro-systemverilog-randomized-layered-testbench https://www.aldec.com/en/company/blog/168--verification-effectiveness-with-riviera-pro-systemverilog-randomized-layered-testbench Fri, 27 Apr 2018 00:00:00 -0700 Verification Effectiveness with Riviera-PRO: SystemVerilog Randomized Layered Testbench Blog: 2018-04-27 https://www.aldec.com/en/company/blog/167--fpgas-vs-gpus-for-machine-learning-applications-which-one-is-better https://www.aldec.com/en/company/blog/167--fpgas-vs-gpus-for-machine-learning-applications-which-one-is-better Fri, 27 Apr 2018 00:00:00 -0700 FPGA vs GPU for Machine Learning Applications: Which one is better? News: 2018-04-18 https://www.aldec.com/en/company/news/2018-04-18/401 https://www.aldec.com/en/company/news/2018-04-18/401 Wed, 18 Apr 2018 00:00:00 -0700 SemiWiki: RDC - A Cousin To CDC News: 2018-04-11 https://www.aldec.com/en/company/news/2018-04-11/398 https://www.aldec.com/en/company/news/2018-04-11/398 Wed, 11 Apr 2018 00:00:00 -0700 Aldec’s HES UltraScale+ Reconfigurable Accelerator and Northwest Logic’s PCI Express Cores Provide Proven PCI Express Solution