Aldec Design and Verification Blog Trending Articles Scalable Cloud-based CI/CD HDL Verification Environment Navigating VUnit: A Practical Guide to Modifying Testing Approaches Speeding Up Simulation with VUnit for Parallel Testing Introduction to VUnit FPGA Design Verification in a Nutshell Versal ACAP Simulation Challenges Real-time SDR system with TySOM All Categories Corporate DO-254 Compliance Embedded Solutions Emulation/Acceleration FPGA Design Functional Verification High Performance Computing Requirements Management SoC and ASIC Prototyping SoC Design and Validation Specialized Applications Vegetarian Dining in Austin - DAC 2016 Helpful Tips From a Local I moved to Austin a little over a year ago, and have quickly learned that this city is a progressive blue island in a sea of red. That's the conventional wisdom, and most of the time it holds up.... Tags:ASIC,Emulation,Verification Like(2) Comments (0) Read more What inspired you to become an engineer? National Engineering Week is February 22-28 This week, February 22-28, we celebrate National Engineers Week in the US to recognize the contributions to society that engineers make. During this time, there is added emphasis in schools on the importance of learning... Tags:Aceleration,Analog,ARM,Aviation,Co-simulation,FPGA,Functional Verification Like(1) Comments (3) Read more Webinars, YouTube, Articles... What’s your preference? Useful resources to help you get ahead “USEFUL” is a word you’ll hear a lot over here at Aldec. It’s the number one way we rank our success when developing a new product or feature. “How USEFUL is it?” is the most common phrase we challenge one another... Tags:Debugging,Design,Embedded,Hardware,safety-critical,Verification Like(2) Comments (0) Read more Last call from Engineer Santa. Survey & daily drawings end Dec 12. 12 Days of Useful Gifts Well folks, last call from Engineer Santa. Aldec’s #12DaysofUsefulGifts giveaway will end this Friday, December 12 at 12pm midnight Pacific Standard Time.... Tags:Verification Like(0) Comments (0) Read more Looking for Practical Holiday Gift Ideas? 12 Days of Useful Gifts Happy Holidays! We’ve made it to Day 4 of Aldec’s #12DaysofUsefulGifts giveaway. If you’ve been keeping up with us on Twitter and YouTube, you know that we’ve given away some fun prizes already.... Tags:Verification Like(1) Comments (0) Read more SVUnit Adds Support for Aldec Riviera-PRO Users A Guest Blog by Neil Johnson, HW Engineer/AgileSoC.com Co-Moderator As I wrote on AgileSoC.com recently, Aldec users have something to get excited about as SVUnit now supports Riviera-PRO™, Aldec’s advanced verification platform. SVUnit is an open-source test framework for ASIC and FPGA developers... Tags:ASIC,FPGA,SystemVerilog,Verification,Verilog Like(1) Comments (0) Read more The Future of EDA? A Guest Blog by Chris Higgs of Potential Ventures I'm not the first engineer to suggest that utilising Python for verification could be a big leap forward for the EDA industry. The big vendors haven’t (yet) embraced this suggestion, so why am I still convinced Python is the way forward?... Tags:Verification,Verilog,VHDL Like(4) Comments (0) Read more The 80s music at DAC was my idea. You're welcome. DAC Chats to be presented live online If you attended the Monday Night Reception at DAC 2014, you were greeted with a blast of 80s pop music. If you then said to yourself, “I’d like to meet the genius behind that idea” - that would be me. A few weeks before DAC... Tags:Embedded,OS-VVM,safety-critical,Training,UVM,Verification Like(3) Comments (0) Read more Much has changed in the last 30 years A New Year’s Reflection from Aldec’s founder and CEO When I first launched Aldec in 1984, home computers hadn’t quite taken off and innovations such as the compact disk and those oversized, power draining cellphones were still struggling to obtain mass acceptance.... Tags:Debugging,Design,Linting,Simulation,UVM,Verification Like(2) Comments (0) Read more Effective Communication is Key in Relationships… and ESL Design! Aldec & Agilent EEsof improve digital/ESL relationship with COMRATE™ engine COMRATE™, the co-simulation solution developed by Aldec and Agilent is a lot like “couples-therapy” that can help get your digital blocks talking to the rest of your model-based design.... Tags:Co-simulation,Debugging,Mixed-signal,Verification Like(3) Comments (0) Read more