Aldec Design and Verification Blog

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ARM-based SoC Co-Emulation using Zynq Boards
Ready-to-use Co-Emulation Platform

Have you ever worked on a group project where you had to combine your work with that of a colleague of a different engineering discipline but the absence of an efficient means of doing so affected the project’s overall outcome?...

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Evaluating NVMe SSD Multi-Gigabit Performance using Aldec TySOM-3/3A Boards

The multi-channel parallelism and low-latency access of NAND flash technology have made Non-Volatile Memory express (NVMe) based SSDs very popular within the main segments of the data storage market, including not only the consumer electronics sector but also data center processing and acceleration services, where the key role is played by specialized FPGA-based hardware for application-specific workloads....

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When is robustness verification for DO-254 projects complete?

Understandably, hardware designed for an aircraft, or indeed any safety critical application, must be robust. I also believe that all engineers wish to verify their designs as thoroughly as possible, anyway. However, there are limiting factors; most notably the high complexity of most designs. Since we are unable to discover and verify the design against all abnormal conditions, the main question is: when is robustness verification truly complete?...

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How to develop high-performance deep neural network object detection/recognition applications for FPGA-based edge devices
Faster inference in DNN-based applications using FPGAs

Machine learning is the process of using algorithms to parse data, learn from it, and then make a decision or prediction. Instead of preparing program codes to accomplish a task, the machine is ‘trained’ using large volumes of data and algorithms to perform...

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HW/SW Co-Verification Environment for Hybrid Systems Using QEMU
SoC Verification Never Been Easier

At the beginning of September, Aldec announced the new version of HES.Proto-AXI software, our host to FPGA bridge solution. This tool supports QEMU for Co-Verification purposes which is considered as one of the main features....

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35-years-old, and still on point

At this year’s Design Automation Conference, held on June 3, 4 and 5 in Las Vegas and about 10 miles away from our head office in Las Vegas, Nevada, we celebrated our 35th anniversary with a resounding reaffirmation of our raison d’etre: the provision of verification solutions for some of industry’s most pressing challenges....

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No Risk No Fun

At the end of February, I attended the Aero Show in India - and what a show it was. So many exhibitors from around the world, including all main players from the commercial and military sides of the aerospace industry.   Visitors could see everything required to build a modern aircraft; from small components like specialized ICs, cables and connectors up to big parts, such as the jet engines, landing gear assemblies and structural components....

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What is Bird’s Eye View ADAS Application and How to Develop This Using Zynq® UltraScale+™ MPSoC FPGA?
Bird’s eye view definition, HW/SW setup and implementation algorithms

Will the world be a better place in which to live by having autonomous cars driving around us? Or would it be unsafe and scary? Maybe someone was asking such a question even when the first steam-powered automobile capable...

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HW/SW Co-Simulation for SoC FPGA designs
Aldec’s Co-Simulation Solution using QEMU and Riviera-PRO

Heterogeneous System on Chip (SoC) devices like the Xilinx Zynq 7000 and Zynq UltraScale+ MPSoC combine a high-performance processing system (PS) with state-of-the-art programmable logic (PL)....

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The Power of PCIe in Performance-based FPGA World
Understanding High speed serial data transfer

In today's world, when the entire computing industry is talking about high-performance and high-speed applications using FPGAs, just what are the factors that can assure such performance and speed?...

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