Careers We are looking for enthusiastic, career-minded individuals to join the Aldec team. Below is a list the current positions that are available at our corporate headquarters. Currently available positions: Location: Katowice, Poland Software Engineer C/C++ Qt library other script/programming languages Code: KT-ALD-Software Engineer Description: Aldec-ADT manufactures modern software for designing FPGA and ASIC integrated circuits. Aldec-ADT products are created for a variety of operating systems using the latest development technologies. Responsibilities: Design of implementation methods and development of new features as well as optimizations of existing modules. We are seeking both for graphical user interface designers and skilled algorithm developers. Requirements: Fluency in C/C++. Knowledge of the Qt library (for GUI developers). Knowledge of other programming and/or scripting languages is a plus. Minimum Education: Bachelor's degree in CS is necessary. Location Available: Katowice, Poland Electronics Engineer C/C++ SystemC SCV TLM Perl Tcl/Tk Code: KT-ALD-Electronics Engineer Description: Aldec-ADT manufactures modern software for designing FPGA and ASIC integrated circuits. Latest technologies delivered by Aldec-ADT are used by thousands of electronics engineers designing and verifying the most complex digital chips in the largest enterprises all over the world. Responsibilities: Evaluation of new technologies for designing integrated circuits, specification of new features and verifying the correctness of the implementation. Requirements: Knowledge of hardware description languages: VHDL, Verilog HDL, SystemVerilog. Knowledge of C/C++ and SystemC, SCV, and TLM libraries. Knowledge of digital circuit technologies. Knowledge of issues and tools for logical synthesis. Acquaintance with Aldec's products a plus. A working knowledge of scripting languages (Perl,Tcl/Tk) is an additional benefit. Minimum Education: Bachelor's degree in EE/CE is necessary. Location Available: Katowice, Poland Senior Software Developer C/C++ System Verilog UVM FPGA & ASIC design flow Aldec Inc. is seeking to fill a Corporate Support Engineer position. The successful candidate will be experienced in digital design (FPGA or ASIC) to support Aldec's VHDL/Verilog/SystemVerilog simulation and verification products used by thousands of FPGA designers worldwide Responsibilities: Supporting Aldec's product line: mixed language simulation and verification platform Riviera-PRO, DRC tool ALINT, Requirements traceability tool SpecTracer Developing and delivering product trainings, verification methodology trainings and demo designs Requirements: Education: BSEE or equivalent required with 2+ years of experience, or MSEE or equivalent with 2+ years of experience. Experience should include: Thorough knowledge of industry-standard hardware description languages (VHDL/Verilog) Solid knowledge of SystemVerilog Basic knowledge of UVM Solid knowledge of FPGA and ASIC design flow Basic knowledge of the following tools: Xilinx Vivado, Xilinx ISE, Altera Quartus, Synopsys Synplify, Microsemi Libero IDE. TCL scripting language Linux operating system Good verbal and written presentation/communication skills Ability to understand and explain relevant technical issues Desire to help customers solve their technical issues Desire to learn new tools/technologies. Location: Katowice, Poland Software Tester Windows Linux Perl Tcl VHDL Verilog C/C++ Code: KT-ALD-Software Tester Description: Aldec-ADT manufactures modern software for designing FPGA and ASIC integrated circuits. Latest technologies delivered by Aldec-ADT are used by thousands of electronics engineers designing and verifying the most complex digital chips in the largest enterprises all over the world. Responsibilities: Development and maintenance of automated software testing infrastructure. The ever expanding server farm currently uses over 250 machines that continuously test our software. The position will be rewarding for conscientiousness persons concerned about accuracy and detail. Requirements: Knowledge of Linux and Windows operating systems. Knowledge of scripting languages, such as Perl or Tcl. Knowledge of VHDL, Verilog, or C/C++ is a plus. Minimum Education: Bachelor's degree in EE, CE, or CS is necessary. Location Available: Katowice, Poland Location: Gliwice, Poland Software Engineer C/C++ Qt library other script/programming languages Code: GL-ALD-Software Engineer Description: Aldec-ADT manufactures modern software for designing FPGA and ASIC integrated circuits. Aldec-ADT products are created for a variety of operating systems using the latest development technologies. Responsibilities: Design of implementation methods and development of new features as well as optimizations of existing modules. We are seeking both for graphical user interface designers and skilled algorithm developers. Requirements: Fluency in C/C++. Knowledge of the Qt library (for GUI developers). Knowledge of other programming and/or scripting languages is a plus. Minimum Education: Bachelor's degree in CS is necessary. Location Available: Gliwice, Poland Electronics Engineer C/C++ SystemC SCV TLM Perl Tcl/Tk Code: GL-ALD-Electronics Engineer Description: Aldec-ADT manufactures modern software for designing FPGA and ASIC integrated circuits. Latest technologies delivered by Aldec-ADT are used by thousands of electronics engineers designing and verifying the most complex digital chips in the largest enterprises all over the world. Responsibilities: Evaluation of new technologies for designing integrated circuits, specification of new features and verifying the correctness of the implementation. Requirements: Knowledge of hardware description languages: VHDL, Verilog HDL, SystemVerilog. Knowledge of C/C++ and SystemC, SCV, and TLM libraries. Knowledge of digital circuit technologies. Knowledge of issues and tools for logical synthesis. Acquaintance with Aldec's products a plus. A working knowledge of scripting languages (Perl,Tcl/Tk) is an additional benefit. Minimum Education: Bachelor's degree in EE/CE is necessary. Location Available: Gliwice, Poland Senior Software Developer C/C++ System Verilog UVM FPGA & ASIC design flow Aldec Inc. is seeking to fill a Corporate Support Engineer position. The successful candidate will be experienced in digital design (FPGA or ASIC) to support Aldec's VHDL/Verilog/SystemVerilog simulation and verification products used by thousands of FPGA designers worldwide Responsibilities: Supporting Aldec's product line: mixed language simulation and verification platform Riviera-PRO, DRC tool ALINT, Requirements traceability tool SpecTracer Developing and delivering product trainings, verification methodology trainings and demo designs Requirements: Education: BSEE or equivalent required with 2+ years of experience, or MSEE or equivalent with 2+ years of experience. Experience should include: Thorough knowledge of industry-standard hardware description languages (VHDL/Verilog) Solid knowledge of SystemVerilog Basic knowledge of UVM Solid knowledge of FPGA and ASIC design flow Basic knowledge of the following tools: Xilinx Vivado, Xilinx ISE, Altera Quartus, Synopsys Synplify, Microsemi Libero IDE. TCL scripting language Linux operating system Good verbal and written presentation/communication skills Ability to understand and explain relevant technical issues Desire to help customers solve their technical issues Desire to learn new tools/technologies. Location Available: Gliwice, Poland Location: Gdańsk, Poland Software Engineer C/C++ SystemC SCV TLM Verilog FPGA SystemVerilog Tcl/Tk SCE-MI VMM OVM Aldec's products Code: GD-ALD-Electronics Engineer Description: The successful candidate will be experienced in digital design (FPGA or ASIC) to develop hardware/FPGA based verification solutions including simulation acceleration, emulation and prototyping. Responsibilities: Development and testing of different hardware modules and systems as part of in-hardware verification products (e.g. FPGA debugging systems, memory units, communication channels and protocols, clocking solutions). Requirements: Knowledge of hardware description languages: VHDL, Verilog HDL, SystemVerilog. Knowledge of C/C++ and SystemC, SCV, and TLM libraries. Good knowledge and practical use of FPGA devices. Knowledge of digital circuit technologies. Knowledge of issues and tools for logical synthesis and FPGA implementation. Acquaintance with Aldec's products a plus. A working knowledge of scripting languages (Perl,Tcl/Tk) is an additional benefit. Knowledge of SCE-MI, VMM and OVM is a big plus. Hardware design in FPGA at high-speed (100+ MHz) is a big plus. Minimum Education: Bachelor's degree in EE/CE is necessary or 5th year technical university student (electronics faculty). Location Available: Gdansk, Poland Location: Kraków, Poland Electronics Engineer C/C++ SystemC SCV TLM Verilog FPGA SystemVerilog Tcl/Tk SCE-MI VMM OVM Aldec's products Code: KR-ALD-Electronics Engineer Description: The successful candidate will be experienced in digital design (FPGA or ASIC) to develop hardware/FPGA based verification solutions including simulation acceleration, emulation and prototyping. Responsibilities: Development and testing of different hardware modules and systems as part of in-hardware verification products (e.g. FPGA debugging systems, memory units, communication channels and protocols, clocking solutions). Requirements: Knowledge of hardware description languages: VHDL, Verilog HDL, SystemVerilog. Knowledge of C/C++ and SystemC, SCV, and TLM libraries. Good knowledge and practical use of FPGA devices. Knowledge of digital circuit technologies. Knowledge of issues and tools for logical synthesis and FPGA implementation. Acquaintance with Aldec's products a plus. A working knowledge of scripting languages (Perl,Tcl/Tk) is an additional benefit. Knowledge of SCE-MI, VMM and OVM is a big plus. Hardware design in FPGA at high-speed (100+ MHz) is a big plus. Minimum Education: Bachelor's degree in EE/CE is necessary or 5th year technical university student (electronics faculty). Location Available: Krakow, Poland
