Aldec Design and Verification Blog Trending Articles How to Develop a 4K Ultra High Definition Image/Video Processing Application Using Zynq® MPSoC FPGA Is your Verification plan pulling you in multiple directions? Try FSM Coverage ARM-based SoC Co-Emulation using Zynq Boards Evaluating NVMe SSD Multi-Gigabit Performance using Aldec TySOM-3/3A Boards When is robustness verification for DO-254 projects complete? How to develop high-performance deep neural network object detection/recognition applications for FPGA-based edge devices HW/SW Co-Verification Environment for Hybrid Systems Using QEMU All Categories Corporate DO-254 Compliance Embedded Solutions Emulation/Acceleration FPGA Design Functional Verification High Performance Computing Requirements Management SoC and ASIC Prototyping SoC Design and Validation Specialized Applications Is your Verification plan pulling you in multiple directions? Try FSM Coverage A quick look into FSM Coverage The verification process is long and time consuming, especially when you are not sure what you are looking for. There are a lots of directions you can go looking for bugs but without a guide, without a plan you will most likely be going in circles.... Tags:Coverage,Debugging,Design,FPGA,SystemVerilog,Verilog,VHDL Like(0) Comments (0) Read more What is Bird’s Eye View ADAS Application and How to Develop This Using Zynq® UltraScale+™ MPSoC FPGA? Bird’s eye view definition, HW/SW setup and implementation algorithms Will the world be a better place in which to live by having autonomous cars driving around us? Or would it be unsafe and scary? Maybe someone was asking such a question even when the first steam-powered automobile capable... Tags:Aceleration,ARM,Embedded,FPGA,Hardware,HDL,Prototyping,Validation,Verification,Verilog,Design,Digital,SoC,Xilinx,Zynq Like(0) Comments (0) Read more Verification Effectiveness with Riviera-PRO: SystemVerilog Randomized Layered Testbench Understanding SystemVerilog Layered Testbench In this blog, I will discuss randomized layered testbenches used in SystemVerilog. We need to understand why we need it,... Tags:Riviera-PRO,ASIC,Assertions,Co-simulation,Coverage,Debugging,Design,Documentation,FPGA,HDL,IEEE,OS-VVM,Randomization,Simulation,standards,SystemVerilog,UVM,Verification,Verilog Like(3) Comments (0) Read more Do I really need a commercial simulator? A quick view of the benefits of a commercial simulator As an Applications Engineer I visit lots of potential customers, or talk to them at trade shows, who are doing FPGA designs but don’t own a commercial simulator. I ask them why that is. Most of the time it is budgetary restrictions. They don’t... Tags:Debugging,Design,Simulation,Verification Like(0) Comments (0) Read more How to Design the New Generation of Reprogrammable Router/Switch Using Zynq FPGA A must for high-traffic network A high-performance router is an absolute must if you want to run a high-traffic network in which different devices need to transfer and receive data as fast as possible. A router with a powerful processor and sufficient local memory... Tags:Aceleration,Design,Digital,Embedded,Emulation,FPGA,Hardware,Industrial,Prototyping,SoC,Xilinx Like(0) Comments (0) Read more Zynq-based Embedded Development Kit for University Programs Cost-effective solution for HW/SW development projects Creativity and innovation, which lead the society to success, rest on the foundational institutions such as schools and universities. They provide fertile soil to seed, grow and flourish enterprises.... Tags:Co-simulation,Embedded,FPGA,HDL,Prototyping,Simulation,SoC,university,Xilinx,Design,Digital Like(0) Comments (0) Read more Software Driven Test of FPGA Prototype Software Driven Test of FPGA Prototype Most everyone would agree how important FPGA prototyping is to test and validate an IP, sub-system, or a complete SoC design. Before the design is taped-out it can be validated at speeds near real operating conditions with physical peripherals and devices connected to it instead of simulation models. ... Tags:ARM,ASIC,Co-simulation,Design,FPGA,Hardware,Prototyping,SoC,Xilinx Like(2) Comments (0) Read more Leveraging the Power of VDMA Engines for Computer Vision Apps with TySOM™ - Part 1 In-depth Overview of VDMA Use Cases for TySOM™ Reference Designs It's pretty hard to overestimate the role of heterogeneous embedded systems based on Xilinx® Zynq®-7000 All-Programmable devices in tasks like computer vision. Many consumer electronics and specialized devices are emerging to facilitate and improve industries such as medical, automotive, security, and IoT. Aldec ... Tags:ARM,Design,FPGA,Embedded,SoC,Xilinx,Auto Like(4) Comments (0) Read more Leveraging the Power of VDMA Engines for Computer Vision Apps with TySOM™ - Part 2 In-depth Overview of VDMA Use Cases for TySOM™ Reference Designs In a previous blog, I reviewed how Xilinx VDMA cores can be used for frame grabbing tasks with digital cameras based on commonly used DVP and MIPI CSI-2 video data interfaces. Now it's time to shed some light on the other side of the subject. ... Tags:ARM,Auto,Design,Embedded,FPGA,Xilinx,SoC Like(4) Comments (0) Read more ‘Don’t Be Afraid of UVM’ Webinar on YouTube Free webinar from the Aldec archives Just in time for Halloween, Aldec has released a popular past webinar Don’t be Afraid of UVM for Hardware Designers on YouTube. Designers are usually very busy doing their work and have little time left for experimentation... Tags:Design,Hardware,resources,SystemVerilog,UVM,Verification Like(1) Comments (0) Read more
