Aldec Design and Verification Blog

Trending Articles
SynthHESer - Aldec’s New Synthesis Tool

In the early days of digital design, all circuits were designed manually. You would draw K-map, optimize the logic and draw the schematics. If you remember, we all did many logic optimization exercises back in college....

Like(2) Comments (2) Read more
Linting RISC-V designs with ALINT-PRO

As the open-source RISC-V instruction set architecture (ISA) continues to gain momentum, the growing number of RISC-V design solutions, and their flexibility, creates a problem when choosing the most reliable and robust solution from a number of contenders....

Like(2) Comments (0) Read more
Is your Verification plan pulling you in multiple directions? Try FSM Coverage
A quick look into FSM Coverage

The verification process is long and time consuming, especially when you are not sure what you are looking for. There are a lots of directions you can go looking for bugs but without a guide, without a plan you will most likely be going in circles....

Like(1) Comments (8) Read more
What is Bird’s Eye View ADAS Application and How to Develop This Using Zynq® UltraScale+™ MPSoC FPGA?
Bird’s eye view definition, HW/SW setup and implementation algorithms

Will the world be a better place in which to live by having autonomous cars driving around us? Or would it be unsafe and scary? Maybe someone was asking such a question even when the first steam-powered automobile capable...

Like(1) Comments (0) Read more
HW/SW Co-Simulation for SoC FPGA designs
Aldec’s Co-Simulation Solution using QEMU and Riviera-PRO

Heterogeneous System on Chip (SoC) devices like the Xilinx Zynq 7000 and Zynq UltraScale+ MPSoC combine a high-performance processing system (PS) with state-of-the-art programmable logic (PL)....

Like(2) Comments (0) Read more
The Race to Zero Latency for High Frequency Trading

The High-Frequency Trading (HFT) industry has received a lot of attention during the last few years. HFT is all about speed and minimizing latency: the faster you can run trading strategies and algorithms for analyzing minute price changes...

Like(2) Comments (0) Read more
FPGA vs GPU for Machine Learning Applications: Which one is better?
Can FPGAs beat GPUs?

FPGAs or GPUs, that is the question.   Since the popularity of using machine learning algorithms to extract and process the information from raw data, it has been a race between FPGA and GPU vendors to offer...

Like(3) Comments (0) Read more
Verification Effectiveness with Riviera-PRO: SystemVerilog Randomized Layered Testbench
Understanding SystemVerilog Layered Testbench

In this blog, I will discuss randomized layered testbenches used in SystemVerilog. We need to understand why we need it,...

Like(4) Comments (0) Read more
How to develop an FPGA-based Embedded Vision application for ADAS, series of blogs – Part 1
FPGA “The winner for the low-power and high-performance vision-based applications”

When should we use the term “Vision for Everything”, as vision-based applications are entering various industries? It’s been a few years since the emergence of...

Like(2) Comments (0) Read more
Code Coverage in HDL Editor? Now That’s a Nice Feature.

For a long time I have been a fan of code coverage tools that are embedded into the simulators themselves, and which give you the ability to switch easily between the code and the coverage results. It is particularly helpful to have a way...

Like(1) Comments (0) Read more
Ask Us a Question
x
Ask Us a Question
x
Captcha ImageReload Captcha
Incorrect data entered.
Thank you! Your question has been submitted. Please allow 1-3 business days for someone to respond to your question.
Internal error occurred. Your question was not submitted. Please contact us using Feedback form.
We use cookies to ensure we give you the best user experience and to provide you with content we believe will be of relevance to you. If you continue to use our site, you consent to our use of cookies. A detailed overview on the use of cookies and other website information is located in our Privacy Policy.