Aldec Design and Verification Blog Trending Articles What is Bird’s Eye View ADAS Application and How to Develop This Using Zynq® UltraScale+™ MPSoC FPGA? HW/SW Co-Simulation for SoC FPGA designs The Power of PCIe in Performance-based FPGA World Problems Accessing Registers? – See how UVM RAL can help The Race to Zero Latency for High Frequency Trading Verification Effectiveness with Riviera-PRO: SystemVerilog Randomized Layered Testbench FPGA vs GPU for Machine Learning Applications: Which one is better? All Categories Corporate DO-254 Compliance Embedded Solutions Emulation/Acceleration FPGA Design Functional Verification High Performance Computing Requirements Management SoC and ASIC Prototyping SoC Design and Validation Specialized Applications What is Bird’s Eye View ADAS Application and How to Develop This Using Zynq® UltraScale+™ MPSoC FPGA? Bird’s eye view definition, HW/SW setup and implementation algorithms Will the world be a better place in which to live by having autonomous cars driving around us? Or would it be unsafe and scary? Maybe someone was asking such a question even when the first steam-powered automobile capable... Tags:Aceleration,ARM,Embedded,FPGA,Hardware,HDL,Prototyping,Validation,Verification,Verilog,Design,Digital,SoC,Xilinx,Zynq Like(0) Comments (0) Read more HW/SW Co-Simulation for SoC FPGA designs Aldec’s Co-Simulation Solution using QEMU and Riviera-PRO Heterogeneous System on Chip (SoC) devices like the Xilinx Zynq 7000 and Zynq UltraScale+ MPSoC combine a high-performance processing system (PS) with state-of-the-art programmable logic (PL).... Tags:Co-simulation,Embedded,FPGA,Hardware,HDL,Simulation,SoC,Validation,Verification,Verilog,VHDL,Xilinx Like(1) Comments (0) Read more The Power of PCIe in Performance-based FPGA World Understanding High speed serial data transfer In today's world, when the entire computing industry is talking about high-performance and high-speed applications using FPGAs, just what are the factors that can assure such performance and speed?... Tags:Aceleration,ASIC,Co-simulation,Documentation,Embedded,Emulation,FPGA,FPGA Simulation,Hardware,HDL,IP,Prototyping,Simulation,SoC,Validation,Verification,Xilinx Like(2) Comments (0) Read more How to Design the New Generation of Reprogrammable Router/Switch Using Zynq FPGA A must for high-traffic network A high-performance router is an absolute must if you want to run a high-traffic network in which different devices need to transfer and receive data as fast as possible. A router with a powerful processor and sufficient local memory... Tags:Aceleration,Design,Digital,Embedded,Emulation,FPGA,Hardware,Industrial,Prototyping,SoC,Xilinx Like(0) Comments (0) Read more Partition your Design for FPGA Prototyping Easily create partitions with HES-DVM Modern ASIC and SoC designs have increased in complexity such that multiple FPGAs of the largest capacity are now required to prototype the entire functionality of the design. As design sizes increase, more and more... Tags:ASIC,FPGA,Prototyping,SoC Like(0) Comments (0) Read more Zynq-based Embedded Development Kit for University Programs Cost-effective solution for HW/SW development projects Creativity and innovation, which lead the society to success, rest on the foundational institutions such as schools and universities. They provide fertile soil to seed, grow and flourish enterprises.... Tags:Co-simulation,Embedded,FPGA,HDL,Prototyping,Simulation,SoC,university,Xilinx,Design,Digital Like(0) Comments (0) Read more Demystifying AXI Interconnection for Zynq SoC FPGA Analyzing the interface between the processing unit and programmable logic in the Zynq architecture Imagine traveling back in the time to the early human ages. It’s going to be both scary and interesting when you meet a person who probably cannot speak or if they do you won’t be able to understand them.... Tags:ARM,FPGA,SoC,Xilinx,Zynq,TySOM,AXI Interconnection Like(0) Comments (0) Read more Software Driven Test of FPGA Prototype Software Driven Test of FPGA Prototype Most everyone would agree how important FPGA prototyping is to test and validate an IP, sub-system, or a complete SoC design. Before the design is taped-out it can be validated at speeds near real operating conditions with physical peripherals and devices connected to it instead of simulation models. ... Tags:ARM,ASIC,Co-simulation,Design,FPGA,Hardware,Prototyping,SoC,Xilinx Like(2) Comments (0) Read more Beer, Cars, and Verification My thoughts after DVCon Europe As I write this, I am visiting the Aldec corporate office in the US on the day following their historical presidential election. It’s been a busy travel season for this product manager, and only a few weeks ago I was at DVCon Europe in Munich - the city of pork knuckles, beer... and of course, cars. ... Tags:Auto,Embedded,OS-VVM,SoC,UVM,VHDL Like(4) Comments (0) Read more Leveraging the Power of VDMA Engines for Computer Vision Apps with TySOM™ - Part 1 In-depth Overview of VDMA Use Cases for TySOM™ Reference Designs It's pretty hard to overestimate the role of heterogeneous embedded systems based on Xilinx® Zynq®-7000 All-Programmable devices in tasks like computer vision. Many consumer electronics and specialized devices are emerging to facilitate and improve industries such as medical, automotive, security, and IoT. Aldec ... Tags:ARM,Design,FPGA,Embedded,SoC,Xilinx,Auto Like(4) Comments (0) Read more
