Event Details

Quantum Qiskit HDL Co-Simulation (FPGA Conference Europe)
Date: Wednesday, July 1, 2026

Time: 4:30 p.m. – 5:10 p.m. (CEST)

Co-simulating Qiskit with VHDL/Verilog represents the bridge between high-level quantum software and the low-level hardware logic required to control physical qubits.

Architectural Pathways for Qiskit-HDL Integration

To synchronize the probabilistic world of Qiskit with the deterministic world of RTL (Register Transfer Level), engineers generally use one of three frameworks:

1. Quantum Control (The Cocotb Approach)

This is the most common path for FPGA engineers. You use Cocotb (a Python-based verification framework) as the "glue."

• Mechanism: Qiskit generates the quantum instructions, and Cocotb passes these values into the HDL simulator via a Python interface.
• Use Case: Developing Quantum Control Units (QCUs) that must handle pulse timing and feedback loops.

2. Quantum Emulation (The Backend Approach)

Instead of just controlling hardware, you use hardware to mimic a quantum computer.

• Mechanism: You write a Custom Qiskit Backend. When you call backend.run(circuit), Qiskit doesn't send data to IBM; it triggers a hardware-accelerated simulation on an FPGA or an HDL simulator.
• Use Case: Testing high-speed quantum algorithms that are too slow to simulate on standard CPUs.

3. Quantum Verification (The Validation Approach)

This focuses on "equivalence checking."

• Mechanism: Running a circuit in Qiskit (the "Golden Model") and the same logic in an HDL environment simultaneously to ensure the hardware accurately represents the quantum gates.
• Use Case: Ensuring that a hardware-implemented CNOT gate produces the exact state vector expected by the theoretical model.
• Technical Examples
• Measurement Transfer: Converting the probability of two tangled qbuits in Qiskit into a high/low digital signal in VHDL.
  State Analysis: Using Qiskit’s visualization tools (like plot_bloch_multitask) and Riviera-PRO Plot view to display data processed by quantum logic.
• Gate Comparison: Correctness of quantum circuits against its hardware-accelerated HDL counterpart.

Level: Beginner