Embedded HPC

Recent years brought an outburst of embedded electronics, many of them containing very powerful microprocessor designs that outperform the capabilities of desktop computers available ten years ago. Smartphones have been a widespread example, but there are hundreds of others. Computer vision, Automotive systems, UAV (drones), security cameras, and network security are only a few categories where embedded electronics are present. However, appetite comes with eating, so software engineers started to develop applications that now can do things unimaginable a few years ago, yet consuming all available computational power of embedded processors. Likewise with desktop computers scaling process geometry or increasing number of CPU cores does not help much to solve their problems. This is why embedded HPC needs algorithm accelerators. Due to the embedded nature of such applications they are very sensitive to power consumption. Not only due to battery powered devices, but also due to harsh conditions the circuits must operate in and dissipate excessive heat.


FPGA Accelerates Embedded Applications

Combination of embedded System on Chip (SoC) containing CPU cores with FPGA promises to leapfrog to the next computational performance level. FPGA vendors realized that opportunity and already provide such chips as for example Xilinx Zynq devices that combine dual core ARM A9 SoC with the FPGA logic to program custom co-processors or accelerators.

Aldec TySOMAldec provides TySOM a new series of boards that are based on Xilinx Zynq device and can be used to evaluate and prototype embedded systems that run complex computing applications and take advantage of FPGA on a single die with ARM cores to accelerate compute intensive portions of algorithms.


Main Features

· TySOM-2 board 

  - Xilinx Zynq 7000 series large parts: XC7Z045 or XC7Z100

· Up to 444K Logic Cells & 2,020 DSP Slices

  - Dual-core ARM Cortex-A9 APU & 1GB DDR3 memory

  - Programmable Logic (PL) for custom hardware accelerators and peripheral controllers

  - On-board connectors for Human Interface Devices (HID): USB2.0, Ethernet, HDMI

· RTL bring-up environment

· RTL Porting Services


Solution Contents

· Aldec TySOM EDK: TySOM-2 board 

· Technical documentation, tutorials and white papers

· SDSoC hardware platform package (Board Support Package - BSP)

· Custom engineering for RTL Porting Services


Reference Designs and Services

For a quick ramp up Aldec provides several reference designs including embedded Linux with use of different peripherals and programmable logic (FPGA) to accelerate application algorithms. If you recognize benefits of FPGA powered embedded HPC but your organization lacks of hardware design experience Aldec’s custom engineering services can bridge this gap. Our long experience in FPGA hardware design and verification can be efficiently used to quickly build a complete system or integrate your algorithms with reference designs that are available out of the box.


Embedded HPC design flow

An example Embedded HPC design flow is based on the Xilinx Vivado HLS and Xilinx SDK software for direct compilation from C to FPGA but other tools can be also used instead.

Example HPC Design Flow

The program or algorithm to accelerate is partitioned in two parts – one designated for acceleration and the other that runs on the host. Such partitioning can be made based on the results of profiling that indicated pieces of C code that are computational intensive. Once the C code to accelerate in FPGA is identified the Xilinx Vivado HLS tool is used to convert from C to Verilog or VHDL RTL code that is appropriate for further automatic processing (synthesis and implementation). Other tools can be also used instead of Vivado HLS for example Cyber Workbench from NEC which is Aldec’s partner.

The next stage is using Xilinx Vivado IP Integrator to configure Zynq ARM subsystem and integrate it with the RTL IP obtained from Vivado HLS. Both Zynq ARM subsystem and RTL IP contain standard AMBA AXI interfaces and the integration is done in a convenient GUI of system level block diagram editor. The whole hardware design can be simulated with Aldec’s high performance Riviera-PRO RTL simulator.

Next steps are run in Xilinx Vivado and are fully automated – these are Synthesis and Implementation that generate FPGA hardware configuration bitstream. Based on what has been implemented Vivado also generates hardware description used as input to create custom embedded Linux image and appropriate drivers and software stacks.

Xilinx Software Development Kit (SDK) tool is used for the embedded software development and integration with the custom hardware platform. At this stage the complete hardware and software containing embedded Linux and user application are built and the images can be uploaded to the Micro-SD card. The last step is just to power up TySOM board and after booting embedded Linux to run the user application.

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