Aldec Design and Verification Blog Trending Articles Scalable Cloud-based CI/CD HDL Verification Environment Navigating VUnit: A Practical Guide to Modifying Testing Approaches Speeding Up Simulation with VUnit for Parallel Testing Introduction to VUnit FPGA Design Verification in a Nutshell Versal ACAP Simulation Challenges Real-time SDR system with TySOM All Categories Corporate DO-254 Compliance Embedded Solutions Emulation/Acceleration FPGA Design Functional Verification High Performance Computing Requirements Management SoC and ASIC Prototyping SoC Design and Validation Specialized Applications SynthHESer - Aldec’s New Synthesis Tool In the early days of digital design, all circuits were designed manually. You would draw K-map, optimize the logic and draw the schematics. If you remember, we all did many logic optimization exercises back in college.... Tags:Xilinx,Aceleration,Design,Embedded,Emulation,HDL,SystemVerilog,Verilog Like(2) Comments (2) Read more How to develop high-performance deep neural network object detection/recognition applications for FPGA-based edge devices Faster inference in DNN-based applications using FPGAs Machine learning is the process of using algorithms to parse data, learn from it, and then make a decision or prediction. Instead of preparing program codes to accomplish a task, the machine is ‘trained’ using large volumes of data and algorithms to perform... Tags:Xilinx Like(1) Comments (0) Read more The Power of PCIe in Performance-based FPGA World Understanding High speed serial data transfer In today's world, when the entire computing industry is talking about high-performance and high-speed applications using FPGAs, just what are the factors that can assure such performance and speed?... Tags:Aceleration,ASIC,Co-simulation,Documentation,Embedded,Emulation,FPGA,FPGA Simulation,Hardware,HDL,IP,Prototyping,Simulation,SoC,Validation,Verification,Xilinx Like(3) Comments (0) Read more Emulation in FPGA For many years, emulators were available only to verification teams working on the largest projects in companies with deep enough pockets. Due to size rather than capabilities they were called “Big Box” emulators and typically were used in order to recover... Tags:ARM,Emulation,Prototyping,Verification,Xilinx Like(1) Comments (0) Read more Accelerating Simulation of Vivado Designs with HES Improve verification speedup with Aldec’s HES-DVM FPGA Design Verification Challenge The FPGA design and verification “ecosystem” changes rapidly to keep pace with the fast growing size of FPGA devices. The largest Xilinx Virtex UltraSCALE chips provide 4.4 Million logic cells... Tags:Aceleration,Co-simulation,FPGA,Simulation,Verification,Xilinx Like(1) Comments (0) Read more To Emulate or Prototype? Is it even a question? Recently I read a Semiwiki article, Army of Engineers on Site Only Masks Weakness, in which author Jean-Marie Brunet of Mentor Graphics wrote that FPGA Prototyping requires an army of tech support engineers on-site to mask... Tags:Emulation,FPGA,Prototyping,Xilinx Like(2) Comments (0) Read more FPGAs Cross Scale Threshold to Enable True FPGA-based Verification Guest Blog by Doug Amos, One-Man-Army FPGA Consultant See full version of this article on EETimes. The news is out! Aldec is adopting Xilinx® Virtex® UltraScale™ devices in its seventh generation Hardware Emulation Solution, HES-7™, heralding a great leap in the capability of FPGA-based verification.... Tags:ASIC,FPGA,Hardware,Prototyping,Xilinx Like(1) Comments (0) Read more Save hours of Place & Route time… in seconds Vivado Incremental Compile for faster Emulation Setup Place & Route implementation can sometimes feel like it takes forever. Consider some of these common scenarios: ● After working overtime to create an emulation build for all emulation users, your manager brings you some... Tags:Emulation,Hardware,resources,Xilinx Like(1) Comments (0) Read more Aldec and Xilinx, Partnered for Success HW/SW Emulation and Functional Verification of Xilinx FPGAs As an Aldec Hardware Product Manager, I make the quick flight from our home base in Las Vegas to San Jose pretty regularly. This week, I’ll be joining Aldec Software Product Manager, Dmitry Melnik, as we head out to attend... Tags:Aceleration,FPGA,SoC,Xilinx,Verification,Hardware Like(1) Comments (0) Read more
