Aldec Design and Verification Blog Trending Articles Bridging Simulation and Hardware Advanced Static Linting for FPGA Performance Optimization Scalable Cloud-based CI/CD HDL Verification Environment Navigating VUnit: A Practical Guide to Modifying Testing Approaches Speeding Up Simulation with VUnit for Parallel Testing Introduction to VUnit FPGA Design Verification in a Nutshell All Categories Corporate DO-254 Compliance Embedded Solutions Emulation/Acceleration FPGA Design Functional Verification High Performance Computing Requirements Management SoC and ASIC Prototyping SoC Design and Validation Specialized Applications Aldec Springs Into Action A look back at a busy industry show season It’s been a busy season for Aldec. The weather has warmed here in the desert and as the trees and greenery enliven in spring, Aldec has also been bursting with activity. From DVCon to the International Symposium on FPGAs in the US to Embedded World ... Tags:Aviation,Embedded,FPGA,Hardware Like(4) Comments (0) Read more Beer, Cars, and Verification My thoughts after DVCon Europe As I write this, I am visiting the Aldec corporate office in the US on the day following their historical presidential election. It’s been a busy travel season for this product manager, and only a few weeks ago I was at DVCon Europe in Munich - the city of pork knuckles, beer... and of course, cars. ... Tags:Auto,Embedded,OS-VVM,SoC,UVM,VHDL Like(5) Comments (0) Read more The 80s music at DAC was my idea. You're welcome. DAC Chats to be presented live online If you attended the Monday Night Reception at DAC 2014, you were greeted with a blast of 80s pop music. If you then said to yourself, “I’d like to meet the genius behind that idea” - that would be me. A few weeks before DAC... Tags:Embedded,OS-VVM,safety-critical,Training,UVM,Verification Like(3) Comments (0) Read more
