Leveraging the Power of VDMA Engines for Computer Vision Apps with TySOM™ - Part 2

In-depth Overview of VDMA Use Cases for TySOM™ Reference Designs

Igor Gorokhov, Embedded Systems Engineer
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In a previous blog, I reviewed how Xilinx VDMA cores can be used for frame grabbing tasks with digital cameras based on commonly used DVP and MIPI CSI-2 video data interfaces. Now it's time to shed some light on the other side of the subject.  


Video Output Subsystems

A video output subsystem, similar to the previously described video input subsystem, is a set of IP cores used to move pixel data from the memory allocated buffers to the video display device interface including colorspace and pixel format conversions if needed. The read channel of a VDMA engine takes the pixel data represented in AXI4-MM format and translates it into a series of outcoming burst DDR transfers to the AXI4-Stream data sink. The main distinction here is a need for pixel clock and video timing generation on the FPGA. Considering the possible support for multiple video screen resolutions, the pixel clock/video sync generation logic should contain an option for realtime reconfiguration for changing resolutions. Additionally, multiple output video streams may be layered together using an appropriate IP core to produce multi-layered video.


High resolution (high speed) video panel: HDMI display

Target HW platform: TySOM-1-7Z030 and TySOM-2-7Z045

The most frequently referenced and de-facto standard piece of hardware for HDMI screen interfacing projects is the AD7511 transmitter module manufactured by Analog Devices (AD). It's used to convert parallel video data into the serial TMDS standard implemented by the HDMI data transmission protocol. Although AD is sharing their own reference design for AD7511 interfacing, the same job can be done using standard Xilinx IP cores from the Vivado IP Catalog. Aldec provides TySOM Ubuntu Embedded Host reference designs based on an AD framework, as well as reference designs equipped with the HDMI video output subsystems based on Xilinx IP cores only. Both approaches benefit from a VDMA read channel implementation.


Low resolution (low speed) video panel: parallel data LCD screen

Target HW platform: TySOM-1-7Z030

LCD touch panels are widely used for smartphone industry touch screen based user environments like Android OS or touch screen driven versions of Linux OS distributions like Ubuntu Phone. The TySOM-1-7Z030 development board is a great hardware platform if you require touchscreen functionality with Zynq. Utilizing touchscreens is easy with the LCD-based Ubuntu Embedded Host TySOM-1-7Z030 reference design. It implements hardware and software support for LCD touchscreens for convenient interfacing with the Zynq processing system.


All Together Now (Conclusion)

Both VDMA channels can be used simultaneously by the same VDMA engine which provides incredible efficiency. The main goal of such a configuration is an attempt to reduce the amount of FPGA resources required for video input/output subsystems implementation. Using the single VDMA engine for both input and output shrinks the size of the design and decreases power consumption.


Leveraging the power of the VDMA engine provided by Xilinx’s IP Catalog is a step toward successful and efficient Zynq-7000 based application design. The freedom from worrying about your direct memory access system allows you to stay focused on your computer vision application deployment instead of wasting your time trying to figure out why the data is not passing the way you expect.


Understanding Aldec TySOM EDK VDMA-centric reference designs may save you development time, reduce time-to-market, and generally increase the overall efficiency of your embedded design.


To learn more about TySOM High-Performance Embedded Development, visit www.aldec.com/products/tysom.

Igor is an embedded systems engineer at Aldec, responsible for TySOM™ series boards reference designs and demo projects.

His in-depth knowledge of SoC/FPGA heterogeneous design makes him an expert at making complex embedded solutions. Igor received his M.S. in Computer Engineering from Donetsk National Technical University, Ukraine.


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