Resources

X’s, or unknowns, can occur in simulation when hardware behavior is undetermined. These X’s can potentially cause problems in real hardware when unaddressed. Riviera-PRO provides a number of tools capable of finding the causes of unknowns. This video will demonstrate these tools such as Xtrace, Cause Finder, Waveform Viewer, Drivers/Readers, and Dataflow.

Riviera-PRO provides an additional simulation mode called Post Simulation Debug Mode. This advanced feature allows for viewing simulation results after the simulation has finished. Note that in this mode, some debugging tools normally available during simulation are not usable such as Processes, Call Stack, toggling breakpoints, Dataflow, and stepping through code. Additionally, this feature does not check out the simulation features in your Riviera-PRO license. This video will go over how to access the mode, how to set up simulation to get post-simulation data, and what simulation and debugging tools are available in this mode.

Assertions are monitor-like processes that continuously track design activities and report if signals have the right values at the right times. Riviera-PRO provides a number of debugging tools dedicated to making debugging with assertions more robust and user-friendly. This video will cover all the debugging tools you can use for debugging assertions as well as reports that can be generated for post-simulation assertion analysis.

Image data resolution is constantly growing in different applications and 4K UltraHD resolution is a standard nowedays. We will demonstrate that Aldec TySOM board which based on Xilinx Zynq FPGA can be successfully used in application and FPGA chip can accelerate functions and algorithms to achieve high performance.

In this video, we showcase Aldec's 4k video transferring reference design using Xilinx Zynq based SoC FPGA device on TySOM-3-ZU7EV board. In this demo, two TySOM-3-ZU7EV board are connected using high data bandwidth interface (QSFP+).

ALINT-PROのRTL Schematic Viewerの使用方法を学びます

Learn how to run simulation and use waveform viewer in Active-HDL

Xilinx Vivado allows the ability to utilize different simulators besides their own. Because of that, the capabilities of Riviera-PRO’s fast and comprehensive simulator are easily accessible when debugging and simulating Vivado projects. This video provides a general overview of how to simulate and debug Vivado projects using Riviera-PRO’s simulator environment.

Finite state machines are present in all major designs and components within those designs. Despite them being common, the number of mistakes found in FSM implementations is surprisingly huge. The FSM exploration features available in ALINT-PRO can quickly catch many errors in an FSM design through Static Analysis.

Take a look at how to use CocoTB with Riviera-PRO. CocoTB is a Co-routine based Co-simulation TestBench environment. It is useful for design reuse and randomized testing using the python scripting language which offers a faster testing phase due to python's ease of use. Enjoy customizability when building your simulation environment that allows you to interact with the Riviera-PRO simulator like triggers for simulation timing or signals. CocoTB is Linux & Windows compatible and has built-in support for Jenkins.

ALINT-PROのバッチモードの使用法を学びます

Learn how to use HDL debugging tools in Active-HDL

Clock Domain Crossing (CDC) Analysis in ALINT-PRO involves static and dynamic verification techniques to ensure reliable cross-domain interactions. This video goes through each stage of the CDC static analysis flow and how to progress through the stages by correcting ruleset violations. The tutorial design implements an enable synchronizer, which ALINT-PRO recognizes and verifies that it establishes functional cross-domain interactions.

In order to properly use any Aldec software, Aldec provides customers with two types of licenses: node-locked and floating. This video will cover how to determine the license type as well as how to properly install each type of license onto a Windows machine.

Clock Domain Crossing (CDC) Analysis in ALINT-PRO involves static and dynamic verification techniques to ensure reliable cross-domain interactions. This video explains the HDL code and CDC static analysis of five simple synchronizers that ALINT-PRO recognizes. The tutorial designs implement synchronizers based on the NDFF synchronizer, each with minor variations on bit-widths, latency, use cases, and tool interpretation/implementation.

One of the versions of Active-HDL Aldec provides is Active-HDL Student Edition. This edition comes with only the basic tools, but it is free to download and does not require a license to use. This video will show where to download this version of Active-HDL and how to install and launch it.

Clock Domain Crossing (CDC) Analysis in ALINT-PRO involves static and dynamic verification techniques to ensure reliable cross-domain interactions. This video explains the HDL code and CDC static analysis of 7 more complex synchronizers that ALINT-PRO recognizes. The tutorial designs are implemented using multiple 2DFF synchronizers with other control logic to create more complex and versatile synchronizers.

Clock Domain Crossing (CDC) Analysis in ALINT-PRO involves static and dynamic verification techniques to ensure reliable cross-domain interactions. In the case that a design requires the usage of a synchronizer not directly recognized by ALINT-PRO, a custom synchronizer can be created to allow the tool to properly handle that synchronizer. This video explains the creation process and CDC static analysis of a custom synchronizer in ALINT-PRO.

In addition to ALINT-PRO's static CDC analysis capabilities, it can also generate assertions depending on which synchronizer is utilized. These assertions can then be used for dynamic CDC analysis of the design in simulation. In this video, the Riviera-PRO simulator will be used in conjunction with ALINT-PRO to run through the entire process of Dynamic CDC analysis.

In addition to ALINT-PRO's static CDC analysis capabilities, it can also generate assertions depending on which synchronizer is utilized. These assertions can then be used for dynamic CDC analysis of the design in simulation. In this video, the Riviera-PRO simulator will be used in conjunction with ALINT-PRO to run through the entire process of Dynamic CDC analysis on complex synchronizers.