Play WebinarTitle: From Traceability to Reusability for Safety-Critical FPGA ProjectsDescription: Effective design reuse strategies are expensive and unfortunately will frequently loose when subjected to time and market pressure. However, Engineers frequently find value in reusing code from other projects. The problem is that the knowledge about the legacy code may not be enough to properly assess the worthiness of reusing it. One possible method to implement reusability is traceability. With traceability, relations and dependencies between requirements, design, test scenarios and verification goals are identified and linked. In this presentation, we propose to enable traceability analysis in the hardware development process in order to achieve reusable requirements, design and verification artifacts.Signing up for an account is easy. With an Aldec account you'll have easy, one-click access to event registration, support, product downloads, evaluation licenses, recorded webinars, white papers, application notes and other resources. Simply provide your corporate e-mail address below - all account requests are verified and confirmed within 48 hours. If you already have an Aldec account, please Sign In below to download the file. 登録 サイン・イン