FPGAクロックの入力周波数を設定するにはどうすればよいですか?

ソリューション

PLLの周波数設定はFPGA_PROGデバイスで制御されます。正確なデータをFPGA_PROGに設定すれば適切なクロックモジュールの設定が保障されます（PLL周波数、クロックバッファ、クロックパス）

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