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Aldec @ DAC 2019: Celebrating its 35th Anniversary and focusing on design acceleration, co-verification and mixed-signal

Date: 2019/05/15Type: Release

Henderson, NV – May 15, 2019 – Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, is celebrating its 35th Anniversary at the 2019 Design Automation Conference (DAC), June 2-6, Las Vegas, NV, and has prepared technical presentations aligned with many of the industry’s hottest topics.

 

“This year’s DAC is a very special one for us as it’s our 35th anniversary and is in Las Vegas, our home city,” says Zibi Zalewski, General Manager of Aldec’s Hardware Division. “During the conference our engineering team will be presenting the latest solutions for a complete verification flow, including multi-language, mixed-signal simulation and hardware emulation and multi-FPGA prototyping. Our technology experts will also be showcasing our latest embedded solutions for 4k video processing and DNN-based object classification using the latest FPGA platforms.”

 

Demonstrations all week

The following presentations will be offered continuously throughout the three main days of DAC – June 3, 4 and 5 - on Aldec’s booth (#623)

Each presentation will last about 30 minutes and interested parties are advised to pre-register to select their preferred subject matter and to secure their preferred date and time slot; where presentation start times commence at 10:00 AM and end at 5:30 PM.

 

Also, all who attend a presentation will automatically be entered into a prize draw, as Aldec is giving away an Apple product on each of the show’s main three days. The prizes and their corresponding draw days are: an Apple iPad, on June 3; an Apple Smart Watch, on June 4; and an Apple MacBook Air, on June 5. Each day’s winner will be drawn at 5:00 PM.

 

4K Video Processing Embedded System Design by the Example of Optical Flow Read more

AI on The Edge - DNN Based Object Classification on TySOM EDK Read more

Hybrid Co-Emulation with ARM Hardware Model Read more

Partitioning Design for Multi-FPGA Prototyping Read more

Aldec and Silvaco Mixed-Signal Simulation Read more

SoC Simulation Environment for Mixed-Signal Designs Read more

Register Generator for Design Register and Memory Management Read more

Advanced UVM tools in Riviera-PRO Read more

 

Contact sales@aldec.com or call +1(702)990-4400 for more details.

 

About DAC

The Design Automation Conference (DAC) is recognized as the premier event for the design of electronic circuits and systems, and for electronic design automation (EDA) and silicon solutions. A diverse worldwide community of more than 1,000 organizations attends each year, represented by system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives as well as researchers and academicians from leading universities. Close to 60 technical sessions selected by a committee of electronic design experts offer information on recent developments and trends, management practices and new products, methodologies and technologies. A highlight of DAC is its exhibition and suite area, with approximately 200 of the leading and emerging EDA, silicon, and intellectual property (IP) companies and design services providers. The conference is sponsored by the Association for Computing Machinery (ACM), the Electronic System Design Alliance (ESDA), and the Institute of Electrical and Electronics Engineers (IEEE), and is supported by ACM's Special Interest Group on Design. www.dac.com

 

About Aldec

Established in 1984, Aldec is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, CDC Verification, IP Cores, High-Performance Computing Platforms, Embedded Development Systems, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com

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