The latest in ASIC Prototyping News, Events and Resources

Date: 2013/02/27Type: Release

ASIC Bulletin

The latest in ASIC Prototyping News, Events and Resources – February 2013

Time-Saving, Hardware-assisted Verification for ASIC/SoC Designs


Identifying effective processes for functional verification of ASIC and SoC designs is of increased significance for engineers due to growing design complexity and integration of embedded components such as CPUs, GPUs, and software device drivers. Overall test time for these systems can include Read more

Increased Debug Capability with Hardware Emulation


Hardware emulators enable a rich environment for debugging complex SoC esigns by providing advantages from both software and hardware. Typically, in software simulation designers can set breakpoints, observe waveforms, and trace signals as they progress through a test bench, but are constrained Read more

Live Prototyping Webinar - March 14, 2013


Webinar: ARM Cortex SoC Prototyping Platform for Industrial Applications

Register for US Session Register for European Session
11am-12pm PDT

3-4pm CET

Aldec's newly released FPGA-based prototyping platform, HES-7™, leverages Xilinx® Virtex®-7 FPGA. Xilinx has introduced a new Stacked Silicon Interconnect technology (SSI), enabling a single Virtex-7 to have 2M logic cells, making it the industry’s largest capacity FPGA. This webinar will provide an overview of modifications to previous Xilinx architecture and the structuring of SSI technology. The webinar will also present how the Virtex-7 benefits

Archived Bulletins:

January 2013


ASIC Prototyping

Upcoming Event:

Embedded World w/ Distributor, eVision - Feb. 26-28


Recorded Webinar:

ASIC/SoC Prototyping with Aldec’s new HES-7 Board


White Paper:

ASIC Prototyping, Co-authored with Xilinx


FAQ's, App Notes:

HES-7™ ASIC Prototyping Platform Documentation


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