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Aldec DO-254 Solutions Blueprint   
The Federal Aviation Administration (FAA) recognizes the use of commonly used tools for FPGA design and verification such as RTL Simulator, Synthesis, Place & Route and Static Timing Analysis. For DAL A and B FPGAs, the FAA also recognizes other tools that improve design, verification, traceability and project management including Requirements Management, Traceability, Tests Management, Design Rule Checker, Clock Domain Crossings (CDC) Analysis, Code Coverage and FPGA Physical Test Systems.
Active-HDL, ALINT-PRO, Spec-TRACER, DO-254/CTS White Papers
DO-254 Tool Qualification Process Guidance for Active-HDL Code Coverage   
The purpose of the document is to Guide the Qualification Process for Active-HDL Code Coverage tool.
DO-254/CTS White Papers
DO-254: Increasing Verification Coverage by Test   
Verification coverage by test is essential to satisfying the objectives of DO-254. However, verification of requirements by test during final board testing is challenging and time-consuming. This white paper explains the reasons behind these challenges, and provides recommendations how to overcome them. The recommendations center around Aldec’s unique device testing methodology that can significantly increase verification coverage by test.
DO-254/CTS White Papers
Introduction to DO-254   
If you are new to DO-254, this white paper can serve as your starting point as you educate yourself with the guidance and regulation. This white paper provides an overview of RTCA/DO-254 purpose, scope and processes, and as well as description of Aldec’s specialized tools for DO-254 targeting DAL A and B PLDs.
Active-HDL, ALINT, Spec-TRACER, DO-254/CTS White Papers
Managing Validation and Verification Activities for DO-254   
This paper provides an overview of the Validation and Verification (V & V) process and its associated activities as described in RTCA/DO-254. With the growing size and complexity of today’s FPGAs, managing V & V activities is becoming difficult and time-consuming. This paper presents a list of recommended features, methodologies and capabilities that must be supported by a tool to manage V & V activities more efficiently.
Spec-TRACER, DO-254/CTS White Papers
Q & A with FAA DO-254 DER Randall Fulton   
Aldec together with FAA DER Randall Fulton conducted a webinar to provide clarifications on some of the most commonly misunderstood objectives and aspects of DO-254. The following is the list of questions that were submitted to Aldec for the webinar. All questions are related to applying DO-254 to FPGAs and PLDs. The answers from Randall Fulton are provided correspondingly.
Spec-TRACER, DO-254/CTS White Papers
Superior Approach to DO-254 Hardware Verification   
Abstract: This White Paper points out the most significant issues which can be encountered during DO-254 compliant verification process of FPGA designs. It proposes the methods of saving development time during the functional verification process by reusing the work done during RTL simulation for in-hardware at-speed testing in target FPGA devices, which assures a high visibility of results and good traceability of requirements.
DO-254/CTS White Papers
Tool Assessment and Qualification with the Aldec DO-254 Compliance Tool Set   
Abstract: The Aldec DO-254 Compliance Tool Set (CTS) provides support for the “Design Assurance Guidance for Airborne Electronic Hardware” (DO-254/ED80) Chapter 11.4 “Tool Assessment and Qualification Process”. Aldec provides support for assessment and qualification of the design and verification tools used in the design of complex electronic hardware such as FPGA, PLD and ASIC devices.
DO-254/CTS White Papers
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