Which SCE-MI interface does HES-DVM support?


HES-DVM supports all types of SCE-MI interfaces defined by the Accellera standard:

  1. SCE-MI 1.0 Macro-Based Interface

    Transactors that adhere to this standard have to instantiate predefined macro modules such as:

    • Message transport modules

      • SceMiMessageInPort

      • SceMiMessageOutPort

    • Clock and reset modules

      • SceMiClockPort

      • SceMiClockControl

  2. SCE-MI 2.0 Function-Based Interface

    HES-DVM provides SCE-MI 2.0 SystemVerilog transactors compiler capable of translating DPI-C function exports and imports to SCE-MI message ports. After compilation and elaboration of such modules HES-DVM generates synthesizable code with SCE-MI infrastructure that can be implemented in the FPGA. HES-DVM also creates DPI-C linkage library that contains all necessary functions that might be used in the testbench.

  3. SCE-MI 2.0 Pipes-Based Interface

    The pipes-based interface fills the gap between the macro-based and function-based interfaces. It allows to achieve high throughput and provides a dynamically scalable channel with features like streaming data and variable length messaging. Ease of use is another big advantage of the pipes-based interface. It is sufficient to instantiate a predefined pipe-transactor in the HDL code and use its predefined C or SystemVerilog API in the testbench HVL code.

Ask Us a Question
Ask Us a Question
Captcha ImageReload Captcha
Incorrect data entered.
Thank you! Your question has been submitted. Please allow 1-3 business days for someone to respond to your question.
Internal error occurred. Your question was not submitted. Please contact us using Feedback form.
We use cookies to ensure we give you the best user experience and to provide you with content we believe will be of relevance to you. If you continue to use our site, you consent to our use of cookies. A detailed overview on the use of cookies and other website information is located in our Privacy Policy.