Error: COMP96_0607: <file name>.vhd : The signal used as the actual parameter in a subprogram which is not a formal parameter of that procedure.


This syntax error is displayed when I attempt to compile a VHDL file. How can I fix it?


This error can happen when several subprogram calls are nested, i.e. one subprogram calls another subprogram. Signal parameters passed to the nested subprogram must be on the parameter list of the calling subprogram. If a global signal is used instead, then this error will be generated.

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