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Name Products Type Action
"glbl.GSR"への階層参照が解決できない    Active-HDL FAQ
.BAKファイルから .BDEファイルをどうやって復元できますか?    Active-HDL FAQ
“signed”、“unsigned”または“integer”タイプを使うと、シミュレーション速度の点で利点がありますか?    Active-HDL FAQ
05-Running Simulation   
Learn how to run simulation and use waveform viewer in Active-HDL
Active-HDL チュートリアル
06-HDL_Debugging   
Learn how to use HDL debugging tools in Active-HDL
Active-HDL チュートリアル
08-Design_Profiler   
Learn how to use Design Profiler
Active-HDL チュートリアル
1.1 Basics: Workspace   
A Workspace is comprised of individual designs containing resources such as source files and output files with simulation results. Learn how to create a new Workspace using the New Workspace Wizard, manage an existing Workspace, and manage the different components of the Workspace.
Active-HDL デモンストレーションビデオ
1.2 Basics: Design Flow Manager   
The Design Flow Manager (DFM) is designed to automate and simplify the design, synthesis, and implementation processes. The interface takes the form of design flowcharts which show the design path in graphical form. Learn how to enable the DFM, choose third party vendor tools for synthesis and implementation, and how to perform each stage of the synthesis and implementation processes.
Active-HDL デモンストレーションビデオ
1.3 Basics: Library Manager   
Learn how to create and manage user libraries, and how to utilize pre-compiled FPGA vendor libraries.
Active-HDL デモンストレーションビデオ
10-Simulink Interface   
Learn how to use Simulink® Interface in Active-HDL
Active-HDL チュートリアル
1つのダイアグラム上に複数のステートマシンを記述する方法    Active-HDL FAQ
2.1 Design Entry: Block Diagram Editor   
The Block Diagram Editor (BDE) is Active-HDL's tool for graphical entry of VHDL, Verilog, and EDIF designs. This is especially useful to those with HDL designs that are largely structural since it is easier to enter descriptions graphically rather than typing hundreds of source code lines. Learn how to create a new block diagram by adding new ports, adding symbols, editing symbols (pin placement, pin names, etc.), connecting symbols with wires/bus, generate HDL code, and how to create a graphical testbench.
Active-HDL デモンストレーションビデオ
2.2 Design Entry: FSM Editor   
Learn how to create a new Finite State Machine (FSM), define ports, add new states, transitions, actions, and conditions; add multiple state machines, generate HDL code, generate a testbench, and run a simulation to trace over the transitions to observe the functionality of the state machine.
Active-HDL デモンストレーションビデオ
2.3 Design Entry: HDL Editor   
The HDL Editor is a text editor for editing HDL source code. It contains features such as keyword coloring (VHDL, Verilog/SystemVerilog, C/C++, SystemC, OVA, and PSL), recording/playing actions, bookmarks, hyperlinks to files, creating structure groups, breakpoints, autoformat/smart indentation, etc. Learn how to create a new HDL file with the New Design Wizard and how to utilize the HDE features within that created source file.
Active-HDL デモンストレーションビデオ
2.4 Design Entry: Mouse Strokes   
A mouse stroke is a way of performing common tasks within a window by moving the mouse in a specific pattern. Learn how to enable, perform, and customize mouse strokes.
Active-HDL デモンストレーションビデオ
2回目のシミュレーション実行時に tcl 変数 ($argv0) はなぜコンソールウィンドウに中括弧付きで表示されるのですか?    Active-HDL FAQ
3.1 Compilation and Simulation: Compilation and Simulation   
Learn how to specify design settings for compilation (setting up debugging windows, selecting maximum optimization, etc.), how to initialize and run simulations, how to view the simulation results, and how to perform compilation and simulation with scripts.
Active-HDL デモンストレーションビデオ
3.2 Compilation and Simulation: Compiling Vivado Simulation Libraries   
When you instantiate any Xilinx black box component in your design, Active-HDL will look for the vendor libraries to define functionality of the Xilinx Component. Before performing simulation of these designs, it is crucial not only to have the proper simulation libraries, but the correct version as well.
Active-HDL デモンストレーションビデオ
3.3 External Tools: Unit Linting in Active-HDL   
Active-HDL offers the design rule checking capabilities of ALINT-PRO directly within the tool through unit linting. Running the feature within the design tool's GUI will perform design checks according to the generated ALINT-PRO project, and those violations will be displayed in Active-HDL's console and HDL editor in the form of various warnings and messages. Modification of a design's policy is facilitated through additional context menu items within the Design Browser, which allows launching of ALINT-PRO into the relevant views for modifying policy or waivers.
Active-HDL, ALINT-PRO デモンストレーションビデオ
4.1 Debugging: Introduction to Debugging    
Active-HDL provides debugging windows such as the Console, Breakpoints, Watch, Process, Call Stack, and List Viewer. Learn how to utilize the features of each window and how to use the windows to debug your designs.
Active-HDL デモンストレーションビデオ
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351 results (page 1/18)
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