Tutorials

Active-HDL provides a built-in interface that allows the integration of MathWork’s intuitive language and a technical computing environment with Aldec's HDL-based simulation environment.

The Simulink Interface built-into Active-HDL provides the integration of the Math Works' simulation tools with Aldec’s HDL-based simulation environment for FPGA and ASIC designs.

This tutorial explains how to use Assertions in Active-HDL.

In this tutorial, you will learn how to create a hardware project in Xilinx’s Vivado Design Suite and create a software project in Xilinx’s SDK for the TySOM-1-7Z030 board. First you will create the hardware part, then you will create a software application to blink the onboard LEDs using standalone OS. In the Zynq architecture, you are able to implement the design either in a bare metal mode or by using an embedded Linux OS platform.

In this tutorial, you will learn how to create a hardware project in Xilinx’s Vivado Design Suite and create a software project in Xilinx’s SDK for the TySOM-1-7Z030 board. First you will create the hardware part, then you will create a software application to blink the onboard LEDs using onboard switches. At the end of this tutorial, you will also learn how to program the project onto the TySOM-1-7Z030 board using a JTAG programmer. To program the FPGA using a microSD card, you can follow the “Programming the TySOM-1-7Z030 board using a microSD card guide”.

Learn how to use Debugging tools in Riviera-PRO

An interrupt is a signal that temporarily halts the processor’s current activities and demands immediate attention. The processor saves its current state and executes an interrupt service routine to address the reason for the interrupt. Real-time designs require interrupts because many systems will have a number of inputs (e.g. keyboards, mouse, pushbuttons etc.) that will require processing. Inputs from these devices are generally asynchronous to the execution of running processes or tasks, so you cannot always predict when the event will occur. Using interrupts enables the processor to continue processing until an event occurs, at which time the processor can address the event. This interrupt-driven approach also speeds up the response time. This basic GPIO interrupt design is intended to enable GPIO interrupts to users on the TySOM-1-7Z030 board. The standard flow includes several stages to create a hardware platform for the Zynq-7000 based board.

Learn how to debug your code in Riviera-PRO

This document provides essential information on configuring and launching Aldec AMI and instructions of using Aldec HES-DVM Proto CE and Board Compiler.

HES-DVM Proto CE is the cloud edition of Aldec's emulation and prototyping platform HES-DVM. The cloud edition is a response to the increasing demand of high-quality partitioning tools used to prepare the design prototype on multi-FPGA platforms. The cloud edition of HES-DVM is limited to prototyping flow and supports up to four (4) partitions that can be mapped to 4 high end Xilinx FPGAs (Virtex UltraScale, UltraScale+ or Virtex-7).

One way of using TySOM board is using it in Xilinx SDx tool which provides mechanisms to convert C/C++ functions to HDL and accelerate them in the FPGA part. This functionality demonstrates the power of Zynq chips and Aldec boards that is still out of reach for standard processors. Additionally, FPGA chips consume less energy than processors, so the boards can be used in embedded applications with a battery power supply. This document provides a comprehensive instruction for adding the custom IP cores into the hardware platform and updating the SDx platform.

This document will demonstrate how to build a Vivado design using TySOM Vivado board definition provided by Aldec. In case of any additional questions visit Aldec website www.aldec.com or create a support case in the Aldec Customer Portal.This flow requires using TySOM Vivado board definition from Aldec GitHub so a TySOM user does not have to build a Vivado project from the scratch.

There are WiFi/Bluetooth devices on TySOM boards to be used for networking purposes. TySOM board needs to be configured for such applications. In this tutorial, you will learn how to configure Wi-Fi direct on TySOM board and use it for a networking project.

This document contains a comprehensive instruction about creating a Wi-Fi access point and configuring it in different wireless communication standards. All steps were checked with TySOM-2A-7Z030 boards. Other boards may require some modification in provided instruction.

Every TySOM board is different, contains different interfaces and connectors and requires a unique Hardware platform. Aldec prepared special SDx platforms to simplify using the TySOM boards. Every SDx platform contains also a set of simple examples provided by Xilinx in xfopencv library which can be used onboard. All projects contains a C++ function which is converted to the FPGA. Aldec customers are also provided with a set of our demo project which they can use as a starting point in developing their applications. This document will demonstrate how to build examples from SDx platforms and how to build Aldec demo project in Xilinx SDx.

One way of using TySOM board is using it in Xilinx SDx tool which provides mechanism to convert C/C++ functions to HDL and accelerate them in the FPGA part. This possibility demonstrates the power of Zynq chips and Aldec boards what is out of reach for standard processors. Additionally FPGA chips consume less energy than processors, so the boards can be used in embedded application with battery power supply. This document provides information how to use Aldec TySOM board in Xilinx SDx tool.

Machine Learning is very popular nowadays and can be used in different applications. This document demonstrates how Aldec’s TySOM boards can be used in these applications.

One way of using TySOM board is using it in Xilinx SDx tool which provides mechanism to convert C/C++ functions to HDL and accelerate them in the FPGA part. This possibility demonstrates the power of Zynq chips and Aldec boards what is out of reach for standard processors. Additionally, FPGA chips consume less energy than processors, so the boards can be used in embedded application with battery power supply. This document provides information how to use Aldec TySOM board in Xilinx SDx tool.

One way of using TySOM board is using it in Xilinx SDx tool which provides a mechanism to convert C/C++ functions to HDL and accelerate them in the FPGA part. This possibility demonstrates the power of Zynq chips and Aldec boards what is out of reach for standard processors. Additionally FPGA chips consume less energy than processors, so the boards can be used in embedded application with battery power supply. This document provides information on how to use Aldec TySOM board in Xilinx SDx tool.