SLP Fatal Error: hier_refs.cpp (700): Internal fatal error

Solution

This error message usually indicates a defect in the tool. Please create a ticket in our Support Portal and attach your code or pre-compiled library. Please include the steps describing how to reproduce the issue. As a workaround, you may try initializing your simulation with the -O2 switch. For example:

asim -lib verilog -O2 <top_level>