See the Future with Impact Analysis

Know the impact of requirements changes before they occur

Louie de Luna, Aldec DO-254 Program Manager
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Imagine if you could look into the future…

See the impact of requirements changes before they occur.

Know with certainty which lines of code in an HDL design or testbench file needed to be re-evaluated based on a change request.

Understand how a requirement change impacts the project schedule to help plan and allocate resources effectively.


In FPGA development, a requirement change can impact any of the following areas:


  • Lower level requirements and/or derived requirements
  • Lines of code in the HDL design files (top level or sub blocks)
  • Requirements-based test cases
  • Lines of code in the testbench files and components of the verification environment
  • Simulation runs, Code Coverage analysis and reports, waveforms and log files
  • Synthesis, Timing or Placement constraints
  • Team member(s) responsible for the affected element

Impact Analysis Defined

Seeing the future is possible with Impact Analysis, a practice within the change control process of product development. Impact Analysis provides information on what design and verification elements, artifacts, hardware components and materials, personnel, assets or activities that may be affected due to a requirement change. Armed with Impact Analysis data, you can then determine which elements to re-evaluate, modify, and even re-create if necessary.


Make Better Decisions and Identify Potential Risks

Suppose Impact Analysis revealed that a change request for a single requirement would impact 60% of the design and verification elements within a project. Impact Analysis data would enable you to answer some important questions before approving the change: 

How does this affect the product delivery schedules?

How critical is the requirement change to FPGA safety and reliability?

Who are the developers affected by the requirement change?

Impact Analysis helps identify potential risks associated with the requirement change, as well as the work needed to implement it.


Impact Analysis requires Traceability

The backbone of Impact Analysis is Traceability, the activity that maps all of the design and verification elements back to requirements. Traceability is the correlation between system board requirements, FPGA requirements, conceptual design, HDL design, post-layout design, requirements-based test cases, testbench, simulation runs, waveforms and log files. With requirements management tools like Spec-TRACER™, traceability is easy and simple to create, and  generating Impact Analysis reports is seamless and automatic.


Spec-TRACERTM Requirements Lifecycle Management solution is equipped with several features and built-in reporting for Impact Analysis, including the report shown in Fig. 1 that uncovers elements that may need to be re-evaluated, rerun or modified. As illustrated here, if there is a change request for requirement ‘FPGA-007 Chip Enable’ then there are 27 elements that will be impacted such as conceptual design, HDL design files, test cases, testbench and simulation runs. Spec-TRACER also works hand in hand with IBM DOORS to extend traceability to FPGA elements, providing visibility to the FPGA design and verification elements that DOORS cannot.

FPGA requirements frequently change during development and Impact Analysis is key in determining the magnitude of the impact before change requests are approved and implemented.  More importantly, it helps teams make well-informed decisions that align with business objectives and project goals.

With the growing complexity and size of today’s FPGA in which an average design consists of hundreds of FPGA-related requirements and thousands of related elements, running Impact Analysis as part of the change control process has never been more crucial to a project’s success. If you have been looking for a crystal ball to look into the future to see ‘What-Ifs’ scenarios to analyze requirement change orders, Impact Analysis is your crystal ball!


Learn more about Spec-TRACER™ Requirements Lifecycle Management and how it can help you take control of requirements from start to finish in this Overview Video.


Louie de Luna is responsible for FPGA level in-target testing technology and requirements lifecycle management for DO-254 and other safety-critical industry standards.  He received his B.S. in Computer Engineering from University of Nevada in 2001.  His practical engineering experience includes areas in Acceleration, Emulation, Co-Verification and Prototyping, and he has held a wide range of engineering positions that include FPGA Design Engineer, Applications Engineer, Product Manager and Project Manager.

  • Products:
  • Spec-TRACER
  • Requirements Management


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