Aldec delivers DO-254 Compliant Templates and Checklists with the latest release of Spec-TRACER
Henderson, NV – February 1st, 2017 – Aldec, Inc., announced today the latest release of its requirements lifecycle management solutions for FPGAs/SoCs, Spec-TRACER™ 2016.12. This release provides industry-proven certification document templates and review checklists for the development of FPGAs in DO-254 programs.
Organizations new to DO-254 often find it difficult to begin a new DO-254 program without a baseline of the required documents and review checklists, and organizations experienced in DO-254 seek to improve their existing baselines due to lessons learned from previous programs. Aldec’s data package, developed by an FAA Consultant DER through many years of auditing several DO-254 programs with design assurance level (DAL) A, B, C and D FPGAs, provides significant value to both new and experienced DO-254 practitioners.
“Having access to industry-proven templates and checklists in a document file is beneficial, but having a single tool environment where multiple stakeholders can systematically capture, manage versions, conduct reviews and generate reports via batch is a key to success in a DO-254 program,” said Louie De Luna, DO-254 Program Manager. “We have introduced the templates and checklist into Spec-TRACER to simplify management and generation of DO-254 life-cycle data.”
Additional Spec-TRACER 2016.12 New Features and Support
- The Scheduled Scan parser feature enables users to schedule the date and time and configure automatic parsing from multiple sources such as Microsoft® Word files, IBM® Rational® DOORS® modules and HDL source files. Users are able to detect file modifications via notifications upon login to the Spec-TRACER project.
- Navigation to the particular line in the MS Word documents and other text files where the captured item is located has been introduced. The navigation is available from Parsers and Full Traceability View.
- IBM Rational DOORS 9.6 is now supported for Import/Export and IBM DOORS Parser.
- Two separate Reviewer tabs: Item Review and Document Review for reviewing data at document level and/or requirement level including Comment, Resolution, Author and Date
- The SpecTrSimRes external command allows specifying the test session name. Previously, the session name was generated based on the date of execution.
Spec-TRACER is a unified requirements lifecycle management application designed to facilitate the requirements-based FPGA/SoC design and verification process. Spec-TRACER facilitates requirements capture, management, analysis, traceability, tests management, reviews and reporting. Spec-TRACER seamlessly integrates with windows-based simulation tools.
New customers and customers without current maintenance contracts are invited to contact their local Aldec Distributor to learn more about the latest release. For additional information about Spec-TRACER 2016.12 including tutorials, free evaluation downloads and What’s New Presentation, please visit www.aldec.com/products/spec-tracer.
Established in 1984, Aldec is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification, Embedded Solutions and Military/Aerospace solutions. www.aldec.com
Christina Toole, Aldec, Inc.
+ (702) 990-4400