Aldec Solutions Support Hardware Architecture of Zynq EPP at X-Fest 2012

Date: Apr 18, 2012Type: Company

Henderson, NV – April 18, 2012  – As an X-Fest 2012 global sponsor, Aldec will visit over 22 cities worldwide to demonstrate its industry leading functional verification platform which, combined with Xilinx ISE™, enables both software and hardware designers to address core verification requirements associated with the most recent Xilinx devices on the market such as Artix-7, Kintex-7, and Virtex-7.

As a member of their Alliance Program, Aldec works together with Xilinx to enable tools for Design Entry, HDL Simulation, Design Rule Checking, and HW Assisted Verification - providing comprehensive hardware design and verification platform for the most advanced devices in the Xilinx portfolio. X-Fest attendees will learn how Aldec-based flows address the Hardware Architecture requirements of Zynq EPP, a new class of product which combines an industry-standard ARM® dual-core Cortex™-A9 MPCore™ processing system with Xilinx 28nm programmable logic.

X-fest 2012, a free technical training event co-hosted by Avnet and Xilinx, takes place throughout North America, Europe, Asia and Japan. Register at http://avnet.me/xfest.


 North America  Dates       Europe  Dates      Asia  Dates 
 Irvine, CA  April 24    Oslo, Norway  May 8    Beijing, China  July 10
 San Diego, CA  April 25    Munich, Germany  May 10    Seoul, S. Korea  July 13
 San Jose, CA  April 26    Antwerp, Benelux  May 14    Bangalore, India  July 17
 Boston, MA  May 1    Milan, Italy  May 15    Shanghai, China  July 20
 Baltimore, MD  May 3    Paris, France  May 16    Shenzhen, China  July 24
 Dallas, TX  May 22    Madrid, Spain  May 17    Hsinchu, Taiwan  July 27
 Minneapolis, MN  May 24    Warwickshire, UK  May 17      
 Toronto, Canada  June 5          Japan  Dates
 Vancouver, Canada  June 7          Tokyo, Japan  July 4


About Aldec

Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, Design Rule Checking, IP Cores, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com

Aldec is a registered trademark of Aldec, Inc.  All other trademarks or registered trademarks are property of their respective owners.

Media Contact:

Christina Toole, Aldec, Inc.
+1 (702) 990-4400

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