Aldec Solutions Support Hardware Architecture of Zynq EPP at X-Fest 2012

Henderson, NV – April 18, 2012  – As an X-Fest 2012 global sponsor, Aldec will visit over 22 cities worldwide to demonstrate its industry leading functional verification platform which, combined with Xilinx ISE™, enables both software and hardware designers to address core verification requirements associated with the most recent Xilinx devices on the market such as Artix-7, Kintex-7, and Virtex-7.

As a member of their Alliance Program, Aldec works together with Xilinx to enable tools for Design Entry, HDL Simulation, Design Rule Checking, and HW Assisted Verification - providing comprehensive hardware design and verification platform for the most advanced devices in the Xilinx portfolio. X-Fest attendees will learn how Aldec-based flows address the Hardware Architecture requirements of Zynq EPP, a new class of product which combines an industry-standard ARM® dual-core Cortex™-A9 MPCore™ processing system with Xilinx 28nm programmable logic.

X-fest 2012, a free technical training event co-hosted by Avnet and Xilinx, takes place throughout North America, Europe, Asia and Japan. Register at http://avnet.me/xfest.

About Aldec

Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, Design Rule Checking, IP Cores, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com

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