EE Journal Chalk Talk “Integrated Design Environment for FPGA”

With Aldec Product Manager, Satyam Jani

Satyam Jani, Product Manager Software Division
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Do you find that FPGA design flows can get a bit confusing and difficult to manage?  What we really need is an integrated design environment that will help us keep our design activities organized. In this episode of Chalk TalkHD Amelia chats with Satyam Jani from Aldec about integrated design environments (IDEs) for FPGA design, why FPGA designers need a vendor-independent IDE, and how an FPGA-centric IDE can help us get through our design flow quite a bit more easily.

 

Satyam manages Aldec’s leading FPGA design entry and simulation tool – Active-HDL. He received his B.S. in Electronics Engineering from Sardar Patel University, India in 2003 and M.S in Electrical Engineering from NJIT, New Jersey in 2005.  His practical engineering experience includes areas in Solid state electronics, Digital Designing and functional verification. He has worked in wide range of engineering positions that include FPGA Design Engineer, Applications Engineer and Product Manager.

  • Products:
  • Active-HDL
  • FPGA Design Simulation

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