Play Webinar

Title: SoC Emulation in FPGA with ARM Hardware Model

Description: Smart IoT devices and AI-driven autonomous machines are set to become commonplace in the near-future. Most will incorporate an ARM-based System-on-Chip (SoC) that has both hardware and software components; that should be verified together. Often, software is verified separately from hardware either due to the lack of accurate ARM hardware model or simulation bottleneck. An emulation platform combining reconfigurable FPGA logic with ARM processors bridges the gap. However, while FPGA vendors have mixed-technology platforms, like Xilinx Zynq, they contain insufficient FPGA logic elements to implement contemporary SoC designs. In this webinar we will demonstrate how to connect Xilinx Zynq MPSoC and its ARM Cortex A53/R5 processors with the largest Xilinx UltraScale FPGA. During a live demo, Aldec’s HES-DVM emulation platform will be connected with a TySOM-3 board, and we will show you how to combine ARM cores from Zynq with the rest of the SoC implemented in Ultrascale FPGA utilizing AMBA AXI and MGT based chip-to-chip interconnect. Finally, we will demonstrate the hardware and software debugging capabilities of such a hybrid emulation platform.

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