Play Webinar

Title: High-level thinking: Using Python for rapid verification of VHDL and Verilog designs

Description: This webinar will present a methodology that enables rapid verification and integration of RTL designs. Aldec is committed to supporting the design verification community by delivering relevant resources, news and trainings. In this webinar, Chris Higgs, Lead Developer at Potential Ventures, will introduce Cocotb, an open-source Python verification framework that is freely available. Working through real-world examples and drawing on extensive experience verifying commercial FPGA projects, the presenter will outline how Cocotb can provide significant savings in development time, promote code re-use and ultimately reduce project time-to-market and total development cost.


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