Aldec @ DAC 2015: Scalable Prototyping, UVM Simulation, Productivity Gains using Python and More View a demo at the Aldec booth on Monday for free entry to our raffle drawing. Prizes include a DJI Phantom Drone Quadcopter and a GoPro camera. Winners will be announced during the Aldec Cocktail Reception Monday night from 5:00pm to 6:00pm at Booth #1725. Join us! FPGAs Cross Scale Threshold to Enable True FPGA-based Verification The news is out! Aldec is adopting Xilinx® Virtex® UltraScale™ devices in its seventh generation Hardware Emulation Solution, HES-7™, heralding a great leap in the capability of FPGA-based verification. Putting the “Automation” back into EDA The Pythonic Tonic: Miracle cure or Snake-oil? Editorial/In The News Aldec HES-7 with Xilinx Virtex UltraScale Devices Enables True FPGA-based Verification [EE Times] Scale & Scalability - The Keys to True FPGA-Based Verification [Chip Design] CDC Verification: Using Both Static and Dynamic Checking is Key to Success [Embedded Computing Design] You needn't decide between prototype or emulation Concept Engineering's Nlview™ Schematic Visualization Engine to Power Aldec's ALINT-PRO-CDC™ CDC Verification Solution Upcoming Events Design Automation Conference (DAC 2015) June 7-11 (San Francisco, CA) MATLAB/Simulink Co-Verification Workshop June 12 (Japan) SystemC Japan 2015 June 19 (Japan) Aldec is a global industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, CDC Verification, IP Cores, DO-254 Functional Verification and Military/Aerospace solutions. +1.702.990.4400 sales@aldec.com www.aldec.com Don't want to receive email Updates? Unsubscribe here.
