ALINT EDU Configuration


EDU Edition
EDU Edition
Design Management
Phase-Based Linting (PBL)
Ref. Note (1)
Integrated Debugging Environment
Supported Languages
Verilog® IEEE 1364 (1995, 2001, 2005)
Single or Mixed Language
VHDL IEEE 1076 (1987, 1993, 2002 and 2008)
Configuration and Setup
Quick Launch Panel
Configuration Viewer
Ref. Note (1)
Rule Description Viewer
Rule Plug-in Viewer
Results Analysis and Reporting
Violation Viewer
Cross Probing To Source Code
Rule Libraries
Aldec Basic (VHDL and Verilog)
Floating license only
Supported Platforms
Windows® 7/Vista/XP/2003 - (32/64-Bit)
Linux x86/x86_64

(1) Custom design rule checking policies creation capabilities are limited as compared to full commercial license of ALINT. 

Configuration Capabilities
Policy and Flow Editors are not available – custom policies and flows can be only created manually.
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