Aldec Design and Verification Blog

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Versal ACAP Simulation Challenges

The electronics industry is all about optimization, and always has been. For example, you might think of system on chip (SoC) as a relatively recent term, coined this century. However, many regard the silicon that appeared in digital watches in the 1970s as constituting a system on a chip, ...

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When is robustness verification for DO-254 projects complete?

Understandably, hardware designed for an aircraft, or indeed any safety critical application, must be robust. I also believe that all engineers wish to verify their designs as thoroughly as possible, anyway. However, there are limiting factors; most notably the high complexity of most designs. Since we are unable to discover and verify the design against all abnormal conditions, the main question is: when is robustness verification truly complete?...

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No Risk No Fun

At the end of February, I attended the Aero Show in India - and what a show it was. So many exhibitors from around the world, including all main players from the commercial and military sides of the aerospace industry.   Visitors could see everything required to build a modern aircraft; from small components like specialized ICs, cables and connectors up to big parts, such as the jet engines, landing gear assemblies and structural components....

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The hardest part of DO-254 is…
Insight from Aldec’s 3-Day DO-254 Practitioner’s Course

The hardest part of DO-254 is not the requirements. It’s not the design. It’s not the verification.   We just wrapped up this year’s 3-day DO-254 Practitioner’s Course, and each year I learn something new. In this year’s training we had attendees...

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A Comprehensive RTL Verification Solution for VHDL
ALINT-PRO™ Design Rule Checking Solution

On Thursday, November 19, I’ll be hosting a webinar to demonstrate Aldec’s RTL Verification Solution for VHDL, ALINT-PRO™ Design Rule Checking Solution.   ALINT-PRO is Aldec’s design verification solution for RTL code...

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The Problem with CDCs
And how it affects your DO-254 project

Part of the Planning Process in DO-254 is knowing the appropriate FPGA tools and capabilities that you need and intend to use for your FPGA design. Particularly if your FPGA device...

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Developing high-reliability FPGAs for DO-254
Can you bet your life on your designs?

You have been developing FPGAs for a long time, and you know your designs from top to bottom. You know every interface protocol, configuration and optimization....

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It’s Here! ALINT-PRO-CDC™ for CDC Verification
Aldec’s new solution for complex multi-clock designs

I am happy to announce, that today Aldec has released ALINT-PRO-CDC™ 2015.01. This solution enables verification of clock domain crossings and handling of metastability issues in complex, modern multi-clock designs....

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Webinars, YouTube, Articles... What’s your preference?
Useful resources to help you get ahead

“USEFUL” is a word you’ll hear a lot over here at Aldec. It’s the number one way we rank our success when developing a new product or feature. “How USEFUL is it?” is the most common phrase we challenge one another...

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Spec-TRACER now directly integrated with IBM DOORS
You asked. We implemented.

In response to user feedback, Aldec has developed a direct integration between IBM® Rational ® DOORS ® and our requirements management tool, Spec-TRACER™, to enable users to extend the traceability data...

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