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  • ALINT 2012.12 SR1. 2-10X Improved Performance on 10+ MG Designs. Bug Detection Early in ASIC/FPGA Design Flow. Customizable Policies, Integrated Debugging. Download free eval.
  • Fast Track™ ONLINE Training. Aldec is now offering free online training design for busy engineers! We invite you to test drive a module on UVM or Assertions today.
  • HES-7™ SoC/ASIC Prototyping. Supports ARM® dual-core Cortex™-A9 with Xilinx® Zynq™-7000 All Programmable SoC. Includes Essential SoC Peripherals.
  • Riviera-PRO 2013.02™ Take your DSP Debugging and Visualization to the next level with Plot Window. Available with the latest release of Riviera-PRO.
  • Spec-TRACER™ 2013.05. Test Drive Spec-TRACER™, Aldec's new Requirements Lifecycle Management solution for Safety-critical FPGA and ASIC Designs. Download free eval.
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News & Events

Newsroom

Missed DAC? Aldec to offer Technical Sessions Online June 11 Aldec launches Spec-TRACER™ – Requirements Lifecycle Management for Safety-critical FPGA and ASIC Designs May 20 Aldec @ DAC 2013: Advanced Verification, HW/SW Emulation, SoC/ASIC Prototyping and more May 15 Aldec Israel to Showcase Innovative Functional Verification Solutions at ChipEx2013 in Tel Aviv April 29 Aldec Presents at Military & Aerospace Programmable Logic Devices Symposium (MAPLD) April 08 View all news

Events

VHDL (Basic+Simulation) Training Jun 18 - 19 (Training, Tokyo, Japan) DO-254 Requirements Traceability (Europe) Jun 20 (Webinar, On-line) DO-254 Requirements Traceability Jun 20 (Webinar, On-line) SystemC Japan 2013 Jun 21 (Industry Event, Shin-Yokohama, Japan) Riviera-PRO Advanced Verification Workshop Jun 26 (Training, Tokyo, Japan) View all events

Recorded Webinars

Don't Be Afraid of UVM (UVM for Hardware Designers) Q & A with FAA DO-254 DER Randall Fulton (US) Efficient Verification of Complex FPGA Designs - with Lattice and Aldec Europe Making a Simple, Structured and Efficient VHDL Testbench ARM Cortex SoC Prototyping Platform for Industrial Applications View all webinars

A Proven EDA Solutions Provider makes all the difference.

Our promise to deliver leading verification methodologies that support the latest Ianguage standards allows our customers to grow while leveraging evolving technologies.

FPGA Design

FPGA Vendors SupportSimulation and DebuggingProject ManagementGraphical/Text Design EntryDocumentation HTML/PDF

Functional Verification

Aldec Cloud™Assertions/Functional CoverageUVM Transaction DebuggingUVM, OVM and VMMOS-VVM™Code CoverageLinting/Design Analysis

Hardware Emulation Solutions

AccelerationEmulationMirror-Box TechnologyHVD TechnologyEmbedded Memory Support

Prototyping

SoC and ASIC PrototypingRTAX/RTSX Netlist ConverterMicrosemi™ (Actel) Prototyping

Requirements Management

DO-254 Requirements TraceabilityTeam-Based MethodologyTest Results ManagementChange Impact Analysis

DO-254 Compliance

HDL Coding StandardsTool Assessment and Qualification ProcessFPGA Level In-Target TestingHDL Detailed Design and Verification

Specialized Applications

Regression ManagerEncryptionDSP and RF Co-Simulation
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