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EE Times: FPGA Testing for DO-254 Compliance May 22 Sigasi integrates Aldec Simulator to Accelerate Feedback Cycle May 22 Tanner EDA and Aldec Deliver High-performance A/MS Solution for Mixed-signal IC Design and Verification May 21 Verified: the need for continued VHDL support May 09 EE Journal: Aldec Harnesses Massive Server Capacity May 08 View all news

Events

MATLAB/Simulink Co-Verification Workshop May 23 (Training, Tokyo, Japan) VHDL (Basic +Simulation) Training May 24 - 25 (Training, Tokyo, Japan) X-Fest 2012 May 24 (Training, Minneapolis, MN) 3-Day DO-254 Practitioner’s Course May 29 - 31 (Training, New York, NY) Enhance Design Quality and Reusability Workshop May 30 (Training, Tokyo, Japan) View all events

Recorded Webinars

Better Coverage in VHDL Efficient Verification of Complex FPGA Designs - with Lattice and Aldec Europe Q & A with FAA DO-254 DER Randall Fulton Bridging Analog and Digital Verification HW / SW Co-Verification: Why wait for silicon? View all webinars

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Microsemi™ (Actel) Prototyping RTAX/RTSX Netlist Converter

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Regression Manager IP Generator MATLAB®/Simulink® Interface Encryption

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