Newsroom
Aldec launches Spec-TRACER™ – Requirements Lifecycle Management for Safety-critical FPGA and ASIC Designs May 20
Aldec @ DAC 2013: Advanced Verification, HW/SW Emulation, SoC/ASIC Prototyping and more May 15
Aldec Israel to Showcase Innovative Functional Verification Solutions at ChipEx2013 in Tel Aviv April 29
Aldec Presents at Military & Aerospace Programmable Logic Devices Symposium (MAPLD) April 08
DSP Survey, Solutions and Resources April 04
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Events
Certification Together International Conference
May 21 - 23 (Industry Event, Toulouse, France)
Riviera-PRO Advanced Verification Workshop
May 22 (Training, Tokyo, Japan)
VHDL (Basic+Simulation) Training
May 23 - 24 (Training, Tokyo, Japan)
Active-HDL Adoption Workshop
May 29 (Training, Tokyo, Japan)
MATLAB/Simulink Co-Verification Workshop
May 31 (Training, Tokyo, Japan)
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Recorded Webinars
Don't Be Afraid of UVM (UVM for Hardware Designers)
Q & A with FAA DO-254 DER Randall Fulton (US)
Efficient Verification of Complex FPGA Designs - with Lattice and Aldec Europe
Making a Simple, Structured and Efficient VHDL Testbench
ARM Cortex SoC Prototyping Platform for Industrial Applications
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