A complete verification ecosystem.
Software and hardware for FPGA design, functional and static verification, ASIC/SoC emulation, embedded development and safety-critical validation.
Riviera-PRO™
Mixed-language simulation, debugging and verification methodologies.
Explore →ALINT-PRO™
RTL linting, CDC/RDC and design rule checking.
Explore →Active-HDL™
Integrated design entry, simulation and debug.
Explore →HES-DVM™
Hybrid verification and validation for large ASIC/SoC designs.
Explore →HES™ Boards
FPGA-based physical prototyping and emulation platforms.
Explore →TySOM™ Boards
Embedded FPGA/SoC prototyping platforms and daughter cards.
Explore →RTAX / RTSX Adaptors
Reprogrammable prototyping workflow for space-flight FPGA designs.
Explore →TySOM EDK
Simulation plus hardware for embedded application development.
Explore →DO-254/CTS™
At-speed FPGA-level in-target testing for DO-254 projects.
Explore →VIP / IP
Reusable IP and verification IP validated with Aldec simulators.
Explore →HES-DVM Proto CE
Cloud-based design partitioning and FPGA prototyping workflow.
Explore →Daughter Cards
FMC/BPX peripheral expansion for HES and TySOM platforms.
Explore →