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Date Event Type 場所 Action
Oct 19 - 20, 2016 DVCon Europe

DVCon Europe 2016 is a technical conference in Europe targeting the application of standardized languages, tools, and methodologies for the design and verification of electronic systems and integrated circuits. Hosted by Accellera Systems Initiative, the format of DVCon Europe 2016 is similar to the successful DVCon United States conference held for over 20 years in the Silicon Valley.

In order to boost the interest, usage and development of electronic design automation (EDA) and intellectual property (IP) standards in Europe, this highly technical conference is organized to invite industry experts to learn and share best practices on:

  • The application of system-level design and verification languages such as SystemC, SystemVerilog or e
  • The use of SystemVerilog Assertions (SVA) or the Property Specification Language (PSL)
  • Verification methodologies based on the Universal Verification Methodology (UVM)
  • IP reuse, automation and integration standards based on IP-XACT
  • Low power design and verification using the Unified Power Format (UPF)

 

General topic areas on Electronic System Level (ESL), Verification & Validation, Analog/Mixed-Signal, IP reuse, Design Automation, and Low Power design and verification, will be highlighted in tutorials, papers, and poster sessions.

With a highly technical focus on System and IC design, verification, and integration, DVCon Europe is a very practical and industry-focused conference on EDA standards and standardization.

Conference attendees are primarily designers of electronic systems, ASICs and FPGAs, as well as those involved in the research, development and application of EDA tools and IP integration.

業界イベント Munich, Germany More Info
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