Henderson, NV, USA – October 2, 2019 – Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for ASIC and FPGA designs, will be exhibiting at Arm TechCon (October 8-10, San Jose, California, USA) and demonstrating solutions that stand to aid greatly in the development of Deep Neural Network (DNN) and Machine Learning (ML) applications.
Visitors to Aldec’s booth (#233) will discover how the company’s versatile EDA tools, hardware platforms and reference designs can enable engineers to fast-track their DNN or ML application development.
For instance, Aldec will be demonstrating a traffic detection reference design for its popular TySOM-3A-ZU19EG platform, which features the largest FPGA in the Xilinx® Zynq® UltraScale+ MPSoC family, the ZU19EG. The reference design also includes ready-to-use gesture detection, pedestrian detection, and segmentation detection.
The company will also be demonstrating the recently announced FPGA autopartitioning feature of HES-DVM™, Aldec’s fully automated and scalable hybrid verification environment, as well as third party board support, and how the feature can be used for the optimization of the resources of multiple FPGAs when prototyping ML applications intended for implementation in an ASIC or SoC.
“The programmability and flexibility of hybrid FPGAs that host firmware and software has made them one of the best choices for machine learning and neural network applications,” comments Zibi Zalewski, General Manager of Aldec’s Hardware Division, “and at Aldec we’re committed to providing the most suitable platforms and EDA tools to aid design and verification. Moreover, the growing number of reference designs, many of which are complementary, for our TySOM platforms means engineers are not having to start their projects with a blank sheet.”
Aldec’s demonstrations on booth #233 at Arm TechCon 2019 will be:
With its focus for Arm TechCon 2019 on DNN and ML application development, one of Aldec’s demonstrations will be of a hybrid emulation platform created through connecting a TySOM board and a HES board.