Aldec reprograms HES7 for AXI4 speed

Date: 2016/02/26Type: In the News

by Don Dingee


FPGA-based prototyping firms are all grappling with the problem of higher speed connectivity between a development host and their hardware. Aldec is announcing their solution at DVCon 2016, turning to an AMBA AXI4 interface bridged into a host with PCIe x8.


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