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Title: VHDL-2019: Just the New Stuff Part 1: Interfaces, Conditional Analysis, File IO, and The New Environment

Description: IEEE 1076-2019, fondly referred to as VHDL-2019, was approved by IEEE RevCom in September 2019 and published in December 2019. The effort was supported mainly by VHDL users – from requirements definition to LRM writing. This is different from the past where employees of EDA vendors did much of the work – particularly the LRM writing. Language changes were use model driven and had multiple opportunities to be pruned from implementation. The process started with a discussion of feature requests. Feature requests were then voted on and ranked. High ranked features were discussed and developed into proposals. Proposals were required to provide use models to affirm their worth and validity. Proposals were then developed into language change specifications (LCS). The entire process was driven by volunteers – and again almost all were users. Volunteerism added another level of scrutiny to each request and/or proposal. If no one was willing to write a proposal or an LCS for an item, then no matter how high the feature or proposal was ranked, it failed to be worthy of being implemented. In Part 1 of VHDL-2019: Just the New Stuff series, we will explore: Interfaces Conditional Compilation File IO Updates Environment Package Updates Interfaces allow abstract connections between designs. Ever wanted to encapsulate all signals of an interface into a single record only to be confounded by not being able to specify the direction of elements of the record? Well now you can. Conditional compilation. Users have requested this numerous times. Finally done! The File IO updates include file open state, rewind, and file position. The Environment package updates include Directory operations, access to Date and Time, and access to environment variables.

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