The main benefit of using a SCE-MI transaction level testbench in emulation is significantly higher speed comparing to bit-accurate emulation or acceleration. However, the C++/SystemC testbench running as a standalone application lacks debugging capabilities available with HDL simulators. HES-DVM fills this gap with several debugging options:
Dynamic Debugging Provides 100% hardware signals visibility in context of HDL source code. This is achieved with Hardware based Visibility Debugging (HVD) processor and Aldec Riviera-PRO simulator debugging GUI framework.
Static Debugging Provides at-speed debugging of statically predefined probes. Debugging data capturing and triggering is based on Advanced Logic Analyzer(ALA) utility.
Breakpoints Provide advanced controllability to the emulation process. Breakpoints allow stopping emulation clocks precisely in the time of occurrence of specific user defined event or condition. This feature is usually used to intelligently switch between debug and speed mode of emulation.
Memory Back-door Interface It is a special interface added to any HES-DVM mapped RAM/ROM module instance. It allows viewing and modifying contents of on-chip memories once running emulation.