Is it controlled in the C testbench or automatically downloaded by HES-DVM software at startup of runtime?
Is it able to download the bit files compiled from HES-DVM software into boards by JTAG connection without PCIe host connection?
ALDEC
C testbench
For FPGA without PCI interface module use function: HESPROTOTYPE_EXPORT hes_handler HesProtoBoardProgram(hes_type_t hes_type, fpga_id_t fpga_id, const char* bit_file, unsigned int serial);
For FPGA with PCI interface module use: HESPROTOTYPE_EXPORT hes_handler HesProtoBoardInit(hes_type_t hes_type, fpga_id_t fpga_id, const char* bit_file, unsigned int serial);
bitfile with PCI interface module should be programmed after all other bitfiles - at the end.
prototool HES-DVM installs a tool called *prototool* It can be used to program FPGAs via host interface channel.
XILINX
Standard JTAG cable and Xilinx programming software