This syntax warning is displayed when I attempt to compile file for my finite state machine. Please help.
Use code coverage pragma.If a state machine has no trap state defined and you are going to generate a Code Coverage report, this option prevents from examining branches with the when others => null; or else null; statements (and collecting coverage statistics for them) by automatic insertion of the Code Coverage pragmas (--vhdl_cover_off and --vhdl_cover_on) to the generated VHDL source code. Otherwise, if a trap state is selected or the Omit empty "when others" case option is checked, the pragmas are not inserted. You can enable this pragma by checking the Use code coverage pragma checkbox on Code Generation Settings Dialog Box (which can be invoked from FSM/Code Generation Settings).