What is a Trap State. What does it mean?
Trap state is essential in describing safe state machines. It is the where the state should go after detection of illegal contents of the state register. Trap state can be selected in the Defaults tab of the Machine Properties window and is marked by red slanted lines crossing the state bubble. Although it may be impossible to reach trap state during simulation (e.g. when symbolic encoding is used), synthesis and implementation tools can use trap state information to produce safer hardware.