Does the simulator have the capability to save the results of one or more outputs into a text file?

Solution

Yes.

  • In the GUI mode: Open the appropriate waveform file and then choose appropriate format from menu File | Export | Waveforms

  • In the Batch mode: Use the the appropriate command to convert like asdb2lst, asdb2vcd etc.

The following text formats are supported:

  • WAVES-compliant test vector files (*.vec). This format is briefly referred to as VEC.

  • Regular VHDL code with process statements generating equivalent signal waveforms. This format is briefly referred to as VHS.

  • Verilog Initial Block format (VER)

  • Value Change Dump and Extended Value Change Dump format (VCD)

  • Tabular format (EXP)

  • List file format (LST)

  • Chip Express Test Vector format (CTV)

Files of the VEC, VHS, VER, or VHR format can be used during the generation of HDL test benches.

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